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AI Engine-ML Intrinsics User Guide (v2024.2)
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Matrix multiplications in which matrix A has data elements of 32 bit and matrix B has data elements of 16 bit. More...
Matrix multiplications in which matrix A has data elements of 32 bit and matrix B has data elements of 16 bit.
For an explanation how these operations works see Multiply Accumulate.
Multiplication of (4x2) with (2x4) with dynamic negation of multiplication result | |
| v16acc64 | mul_4x2_2x4_conf (v16uint32 a, v32uint16 b, int sub_mul) |
| v16acc64 | negmul_4x2_2x4_conf (v16uint32 a, v32uint16 b, int sub_mul) |
| v16acc64 | mul_4x2_2x4_conf (v16uint32 a, v32int16 b, int sub_mul) |
| v16acc64 | negmul_4x2_2x4_conf (v16uint32 a, v32int16 b, int sub_mul) |
| v16acc64 | mul_4x2_2x4_conf (v16int32 a, v32uint16 b, int sub_mul) |
| v16acc64 | negmul_4x2_2x4_conf (v16int32 a, v32uint16 b, int sub_mul) |
| v16acc64 | mul_4x2_2x4_conf (v16int32 a, v32int16 b, int sub_mul) |
| v16acc64 | negmul_4x2_2x4_conf (v16int32 a, v32int16 b, int sub_mul) |
Multiplication of (4x2) with (2x4) with dynamic negation of multiplication result, zeroing of acc1, and negation of acc1 | |
| v16acc64 | mac_4x2_2x4_conf (v16uint32 a, v32uint16 b, v16acc64 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
| v16acc64 | msc_4x2_2x4_conf (v16uint32 a, v32uint16 b, v16acc64 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
| v16acc64 | negmsc_4x2_2x4_conf (v16uint32 a, v32uint16 b, v16acc64 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
| v16acc64 | negmac_4x2_2x4_conf (v16uint32 a, v32uint16 b, v16acc64 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
| v16acc64 | addmac_4x2_2x4_conf (v16uint32 a, v32uint16 b, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | addmsc_4x2_2x4_conf (v16uint32 a, v32uint16 b, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | submac_4x2_2x4_conf (v16uint32 a, v32uint16 b, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | submsc_4x2_2x4_conf (v16uint32 a, v32uint16 b, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | mac_4x2_2x4_conf (v16uint32 a, v32int16 b, v16acc64 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
| v16acc64 | msc_4x2_2x4_conf (v16uint32 a, v32int16 b, v16acc64 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
| v16acc64 | negmsc_4x2_2x4_conf (v16uint32 a, v32int16 b, v16acc64 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
| v16acc64 | negmac_4x2_2x4_conf (v16uint32 a, v32int16 b, v16acc64 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
| v16acc64 | addmac_4x2_2x4_conf (v16uint32 a, v32int16 b, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | addmsc_4x2_2x4_conf (v16uint32 a, v32int16 b, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | submac_4x2_2x4_conf (v16uint32 a, v32int16 b, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | submsc_4x2_2x4_conf (v16uint32 a, v32int16 b, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | mac_4x2_2x4_conf (v16int32 a, v32uint16 b, v16acc64 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
| v16acc64 | msc_4x2_2x4_conf (v16int32 a, v32uint16 b, v16acc64 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
| v16acc64 | negmsc_4x2_2x4_conf (v16int32 a, v32uint16 b, v16acc64 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
| v16acc64 | negmac_4x2_2x4_conf (v16int32 a, v32uint16 b, v16acc64 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
| v16acc64 | addmac_4x2_2x4_conf (v16int32 a, v32uint16 b, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | addmsc_4x2_2x4_conf (v16int32 a, v32uint16 b, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | submac_4x2_2x4_conf (v16int32 a, v32uint16 b, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | submsc_4x2_2x4_conf (v16int32 a, v32uint16 b, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | mac_4x2_2x4_conf (v16int32 a, v32int16 b, v16acc64 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
| v16acc64 | msc_4x2_2x4_conf (v16int32 a, v32int16 b, v16acc64 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
| v16acc64 | negmsc_4x2_2x4_conf (v16int32 a, v32int16 b, v16acc64 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
| v16acc64 | negmac_4x2_2x4_conf (v16int32 a, v32int16 b, v16acc64 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
| v16acc64 | addmac_4x2_2x4_conf (v16int32 a, v32int16 b, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | addmsc_4x2_2x4_conf (v16int32 a, v32int16 b, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | submac_4x2_2x4_conf (v16int32 a, v32int16 b, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | submsc_4x2_2x4_conf (v16int32 a, v32int16 b, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
Multiplication of (4x2) with (2x4) with dynamic sign and dynamic negation of multiplication result | |
| v16acc64 | mul_4x2_2x4_conf (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, int sub_mul) |
| v16acc64 | negmul_4x2_2x4_conf (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, int sub_mul) |
| v16acc64 | mac_4x2_2x4_conf (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, v16acc64 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
| v16acc64 | msc_4x2_2x4_conf (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, v16acc64 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
| v16acc64 | negmsc_4x2_2x4_conf (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, v16acc64 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
| v16acc64 | negmac_4x2_2x4_conf (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, v16acc64 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
| v16acc64 | addmac_4x2_2x4_conf (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | addmsc_4x2_2x4_conf (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | submac_4x2_2x4_conf (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | submsc_4x2_2x4_conf (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | mul_4x2_2x4_conf (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, int sub_mul) |
| v16acc64 | negmul_4x2_2x4_conf (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, int sub_mul) |
| v16acc64 | mac_4x2_2x4_conf (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, v16acc64 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
| v16acc64 | msc_4x2_2x4_conf (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, v16acc64 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
| v16acc64 | negmsc_4x2_2x4_conf (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, v16acc64 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
| v16acc64 | negmac_4x2_2x4_conf (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, v16acc64 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
| v16acc64 | addmac_4x2_2x4_conf (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | addmsc_4x2_2x4_conf (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | submac_4x2_2x4_conf (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | submsc_4x2_2x4_conf (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | mul_4x2_2x4_conf (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, int sub_mul) |
| v16acc64 | negmul_4x2_2x4_conf (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, int sub_mul) |
| v16acc64 | mac_4x2_2x4_conf (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, v16acc64 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
| v16acc64 | msc_4x2_2x4_conf (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, v16acc64 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
| v16acc64 | negmsc_4x2_2x4_conf (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, v16acc64 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
| v16acc64 | negmac_4x2_2x4_conf (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, v16acc64 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
| v16acc64 | addmac_4x2_2x4_conf (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | addmsc_4x2_2x4_conf (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | submac_4x2_2x4_conf (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | submsc_4x2_2x4_conf (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | mul_4x2_2x4_conf (v16int32 a, int sgn_x, v32int16 b, int sgn_y, int sub_mul) |
| v16acc64 | negmul_4x2_2x4_conf (v16int32 a, int sgn_x, v32int16 b, int sgn_y, int sub_mul) |
| v16acc64 | mac_4x2_2x4_conf (v16int32 a, int sgn_x, v32int16 b, int sgn_y, v16acc64 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
| v16acc64 | msc_4x2_2x4_conf (v16int32 a, int sgn_x, v32int16 b, int sgn_y, v16acc64 acc1, int zero_acc1, int shift16, int sub_mul, int sub_acc1) |
| v16acc64 | negmsc_4x2_2x4_conf (v16int32 a, int sgn_x, v32int16 b, int sgn_y, v16acc64 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
| v16acc64 | negmac_4x2_2x4_conf (v16int32 a, int sgn_x, v32int16 b, int sgn_y, v16acc64 acc1, int zero_acc1, int sub_mul, int sub_acc1) |
| v16acc64 | addmac_4x2_2x4_conf (v16int32 a, int sgn_x, v32int16 b, int sgn_y, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | addmsc_4x2_2x4_conf (v16int32 a, int sgn_x, v32int16 b, int sgn_y, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | submac_4x2_2x4_conf (v16int32 a, int sgn_x, v32int16 b, int sgn_y, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 | submsc_4x2_2x4_conf (v16int32 a, int sgn_x, v32int16 b, int sgn_y, v16acc64 acc1, v16acc64 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v16acc64 addmac_4x2_2x4 | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16acc64 addmac_4x2_2x4 | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16acc64 addmac_4x2_2x4 | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16acc64 addmac_4x2_2x4 | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16acc64 addmac_4x2_2x4_conf | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 addmac_4x2_2x4_conf | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 addmac_4x2_2x4_conf | ( | v16int32 | a, |
| v32int16 | b, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 addmac_4x2_2x4_conf | ( | v16int32 | a, |
| v32uint16 | b, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 addmac_4x2_2x4_conf | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 addmac_4x2_2x4_conf | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 addmac_4x2_2x4_conf | ( | v16uint32 | a, |
| v32int16 | b, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 addmac_4x2_2x4_conf | ( | v16uint32 | a, |
| v32uint16 | b, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 addmsc_4x2_2x4 | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16acc64 addmsc_4x2_2x4 | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16acc64 addmsc_4x2_2x4 | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16acc64 addmsc_4x2_2x4 | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16acc64 addmsc_4x2_2x4_conf | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result. |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 addmsc_4x2_2x4_conf | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result. |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 addmsc_4x2_2x4_conf | ( | v16int32 | a, |
| v32int16 | b, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 addmsc_4x2_2x4_conf | ( | v16int32 | a, |
| v32uint16 | b, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 addmsc_4x2_2x4_conf | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result. |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 addmsc_4x2_2x4_conf | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result. |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 addmsc_4x2_2x4_conf | ( | v16uint32 | a, |
| v32int16 | b, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 addmsc_4x2_2x4_conf | ( | v16uint32 | a, |
| v32uint16 | b, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| v16acc64 mac_4x2_2x4_conf | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 mac_4x2_2x4_conf | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 mac_4x2_2x4_conf | ( | v16int32 | a, |
| v32int16 | b, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 mac_4x2_2x4_conf | ( | v16int32 | a, |
| v32uint16 | b, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 mac_4x2_2x4_conf | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 mac_4x2_2x4_conf | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 mac_4x2_2x4_conf | ( | v16uint32 | a, |
| v32int16 | b, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 mac_4x2_2x4_conf | ( | v16uint32 | a, |
| v32uint16 | b, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| v16acc64 msc_4x2_2x4_conf | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
| sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
| v16acc64 msc_4x2_2x4_conf | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
| sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
| v16acc64 msc_4x2_2x4_conf | ( | v16int32 | a, |
| v32int16 | b, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 msc_4x2_2x4_conf | ( | v16int32 | a, |
| v32uint16 | b, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 msc_4x2_2x4_conf | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
| sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
| v16acc64 msc_4x2_2x4_conf | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
| sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
| v16acc64 msc_4x2_2x4_conf | ( | v16uint32 | a, |
| v32int16 | b, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 msc_4x2_2x4_conf | ( | v16uint32 | a, |
| v32uint16 | b, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
| a | Matrix A |
| b | Matrix B |
| sub_mul | Negation mask for multiplication result |
| a | Matrix A |
| b | Matrix B |
| sub_mul | Negation mask for multiplication result |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| sub_mul | Negation mask of multiplication result. If a bit is set the corresponding output accumulator lane is negated. |
| a | Matrix A |
| b | Matrix B |
| sub_mul | Negation mask for multiplication result |
| a | Matrix A |
| b | Matrix B |
| sub_mul | Negation mask for multiplication result |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| v16acc64 negmac_4x2_2x4_conf | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 negmac_4x2_2x4_conf | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 negmac_4x2_2x4_conf | ( | v16int32 | a, |
| v32int16 | b, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 negmac_4x2_2x4_conf | ( | v16int32 | a, |
| v32uint16 | b, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 negmac_4x2_2x4_conf | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 negmac_4x2_2x4_conf | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 negmac_4x2_2x4_conf | ( | v16uint32 | a, |
| v32int16 | b, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 negmac_4x2_2x4_conf | ( | v16uint32 | a, |
| v32uint16 | b, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| v16acc64 negmsc_4x2_2x4_conf | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 negmsc_4x2_2x4_conf | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 negmsc_4x2_2x4_conf | ( | v16int32 | a, |
| v32int16 | b, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
| v16acc64 negmsc_4x2_2x4_conf | ( | v16int32 | a, |
| v32uint16 | b, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
| v16acc64 negmsc_4x2_2x4_conf | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 negmsc_4x2_2x4_conf | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v16acc64 negmsc_4x2_2x4_conf | ( | v16uint32 | a, |
| v32int16 | b, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
| v16acc64 negmsc_4x2_2x4_conf | ( | v16uint32 | a, |
| v32uint16 | b, | ||
| v16acc64 | acc1, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1. If a bit is set the corresponding accumulator lane of acc1 is negated. |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| sub_mul | Negation mask of multiplication result |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| sub_mul | Negation mask of multiplication result |
| a | Matrix A |
| b | Matrix B |
| sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
| a | Matrix A |
| b | Matrix B |
| sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| sub_mul | Negation mask of multiplication result |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| sub_mul | Negation mask of multiplication result |
| a | Matrix A |
| b | Matrix B |
| sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
| a | Matrix A |
| b | Matrix B |
| sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
| v16acc64 submac_4x2_2x4 | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16acc64 submac_4x2_2x4 | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16acc64 submac_4x2_2x4 | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16acc64 submac_4x2_2x4 | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16acc64 submac_4x2_2x4_conf | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 submac_4x2_2x4_conf | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 submac_4x2_2x4_conf | ( | v16int32 | a, |
| v32int16 | b, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 submac_4x2_2x4_conf | ( | v16int32 | a, |
| v32uint16 | b, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 submac_4x2_2x4_conf | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 submac_4x2_2x4_conf | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 submac_4x2_2x4_conf | ( | v16uint32 | a, |
| v32int16 | b, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 submac_4x2_2x4_conf | ( | v16uint32 | a, |
| v32uint16 | b, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 submsc_4x2_2x4 | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16acc64 submsc_4x2_2x4 | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16acc64 submsc_4x2_2x4 | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16acc64 submsc_4x2_2x4 | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16acc64 submsc_4x2_2x4_conf | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result. |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 submsc_4x2_2x4_conf | ( | v16int32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result. |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 submsc_4x2_2x4_conf | ( | v16int32 | a, |
| v32int16 | b, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 submsc_4x2_2x4_conf | ( | v16int32 | a, |
| v32uint16 | b, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 submsc_4x2_2x4_conf | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32int16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result. |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 submsc_4x2_2x4_conf | ( | v16uint32 | a, |
| int | sgn_x, | ||
| v32uint16 | b, | ||
| int | sgn_y, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result. |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 submsc_4x2_2x4_conf | ( | v16uint32 | a, |
| v32int16 | b, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |
| v16acc64 submsc_4x2_2x4_conf | ( | v16uint32 | a, |
| v32uint16 | b, | ||
| v16acc64 | acc1, | ||
| v16acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| sub_acc2 | Negation mask of acc2 |