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AI Engine-ML Intrinsics User Guide (v2025.1)
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Matrix multiplications in which matrix A has data elements of 8 bit and matrix B has data elements of 4 bit. These operations are emulated on top of int8 x int8. More...
Matrix multiplications in which matrix A has data elements of 8 bit and matrix B has data elements of 4 bit. These operations are emulated on top of int8 x int8.
For an explanation how these operations works see Multiply Accumulate.
4x16_16x8 with dynamic negation of multiplication result | |
| v32acc32 | mul_4x16_16x8_conf (v64int8 a, v128int4 b, int sub_mul) |
| v32acc32 | negmul_4x16_16x8_conf (v64int8 a, v128int4 b, int sub_mul) |
| v32acc32 | mul_4x16_16x8_conf (v64int8 a, v128uint4 b, int sub_mul) |
| v32acc32 | negmul_4x16_16x8_conf (v64int8 a, v128uint4 b, int sub_mul) |
| v32acc32 | mul_4x16_16x8_conf (v64uint8 a, v128uint4 b, int sub_mul) |
| v32acc32 | negmul_4x16_16x8_conf (v64uint8 a, v128uint4 b, int sub_mul) |
| v32acc32 | mul_4x16_16x8_conf (v64uint8 a, v128int4 b, int sub_mul) |
| v32acc32 | negmul_4x16_16x8_conf (v64uint8 a, v128int4 b, int sub_mul) |
4x16_16x8 with dynamic negation of multiplication result, zeroing of acc1, negation of acc1 | |
| v32acc32 | mac_4x16_16x8_conf (v64int8 a, v128int4 b, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | msc_4x16_16x8_conf (v64int8 a, v128int4 b, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | negmsc_4x16_16x8_conf (v64int8 a, v128int4 b, v32acc32 acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32acc32 | negmac_4x16_16x8_conf (v64int8 a, v128int4 b, v32acc32 acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32acc32 | addmac_4x16_16x8_conf (v64int8 a, v128int4 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | addmsc_4x16_16x8_conf (v64int8 a, v128int4 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | submac_4x16_16x8_conf (v64int8 a, v128int4 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | submsc_4x16_16x8_conf (v64int8 a, v128int4 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | mac_4x16_16x8_conf (v64int8 a, v128uint4 b, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | msc_4x16_16x8_conf (v64int8 a, v128uint4 b, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | negmsc_4x16_16x8_conf (v64int8 a, v128uint4 b, v32acc32 acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32acc32 | negmac_4x16_16x8_conf (v64int8 a, v128uint4 b, v32acc32 acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32acc32 | addmac_4x16_16x8_conf (v64int8 a, v128uint4 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | addmsc_4x16_16x8_conf (v64int8 a, v128uint4 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | submac_4x16_16x8_conf (v64int8 a, v128uint4 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | submsc_4x16_16x8_conf (v64int8 a, v128uint4 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | mac_4x16_16x8_conf (v64uint8 a, v128uint4 b, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | msc_4x16_16x8_conf (v64uint8 a, v128uint4 b, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | negmsc_4x16_16x8_conf (v64uint8 a, v128uint4 b, v32acc32 acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32acc32 | negmac_4x16_16x8_conf (v64uint8 a, v128uint4 b, v32acc32 acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32acc32 | addmac_4x16_16x8_conf (v64uint8 a, v128uint4 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | addmsc_4x16_16x8_conf (v64uint8 a, v128uint4 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | submac_4x16_16x8_conf (v64uint8 a, v128uint4 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | submsc_4x16_16x8_conf (v64uint8 a, v128uint4 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | mac_4x16_16x8_conf (v64uint8 a, v128int4 b, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | msc_4x16_16x8_conf (v64uint8 a, v128int4 b, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | negmsc_4x16_16x8_conf (v64uint8 a, v128int4 b, v32acc32 acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32acc32 | negmac_4x16_16x8_conf (v64uint8 a, v128int4 b, v32acc32 acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32acc32 | addmac_4x16_16x8_conf (v64uint8 a, v128int4 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | addmsc_4x16_16x8_conf (v64uint8 a, v128int4 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | submac_4x16_16x8_conf (v64uint8 a, v128int4 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | submsc_4x16_16x8_conf (v64uint8 a, v128int4 b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
4x16_16x8 with dynamic sign and dynamic negation of multiplication result | |
| v32acc32 | mac_4x16_16x8_conf (v64int8 a, int sgn_x, v128int4 b, int sgn_y, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | mul_4x16_16x8_conf (v64int8 a, int sgn_x, v128int4 b, int sgn_y, int sub_mul) |
| v32acc32 | negmul_4x16_16x8_conf (v64int8 a, int sgn_x, v128int4 b, int sgn_y, int sub_mul) |
| v32acc32 | msc_4x16_16x8_conf (v64int8 a, int sgn_x, v128int4 b, int sgn_y, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | negmsc_4x16_16x8_conf (v64int8 a, int sgn_x, v128int4 b, int sgn_y, v32acc32 acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32acc32 | negmac_4x16_16x8_conf (v64int8 a, int sgn_x, v128int4 b, int sgn_y, v32acc32 acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32acc32 | addmac_4x16_16x8_conf (v64int8 a, int sgn_x, v128int4 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | addmsc_4x16_16x8_conf (v64int8 a, int sgn_x, v128int4 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | submac_4x16_16x8_conf (v64int8 a, int sgn_x, v128int4 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | submsc_4x16_16x8_conf (v64int8 a, int sgn_x, v128int4 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | mac_4x16_16x8_conf (v64int8 a, int sgn_x, v128uint4 b, int sgn_y, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | mul_4x16_16x8_conf (v64int8 a, int sgn_x, v128uint4 b, int sgn_y, int sub_mul) |
| v32acc32 | negmul_4x16_16x8_conf (v64int8 a, int sgn_x, v128uint4 b, int sgn_y, int sub_mul) |
| v32acc32 | msc_4x16_16x8_conf (v64int8 a, int sgn_x, v128uint4 b, int sgn_y, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | negmsc_4x16_16x8_conf (v64int8 a, int sgn_x, v128uint4 b, int sgn_y, v32acc32 acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32acc32 | negmac_4x16_16x8_conf (v64int8 a, int sgn_x, v128uint4 b, int sgn_y, v32acc32 acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32acc32 | addmac_4x16_16x8_conf (v64int8 a, int sgn_x, v128uint4 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | addmsc_4x16_16x8_conf (v64int8 a, int sgn_x, v128uint4 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | submac_4x16_16x8_conf (v64int8 a, int sgn_x, v128uint4 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | submsc_4x16_16x8_conf (v64int8 a, int sgn_x, v128uint4 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | mac_4x16_16x8_conf (v64uint8 a, int sgn_x, v128uint4 b, int sgn_y, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | mul_4x16_16x8_conf (v64uint8 a, int sgn_x, v128uint4 b, int sgn_y, int sub_mul) |
| v32acc32 | negmul_4x16_16x8_conf (v64uint8 a, int sgn_x, v128uint4 b, int sgn_y, int sub_mul) |
| v32acc32 | msc_4x16_16x8_conf (v64uint8 a, int sgn_x, v128uint4 b, int sgn_y, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | negmsc_4x16_16x8_conf (v64uint8 a, int sgn_x, v128uint4 b, int sgn_y, v32acc32 acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32acc32 | negmac_4x16_16x8_conf (v64uint8 a, int sgn_x, v128uint4 b, int sgn_y, v32acc32 acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32acc32 | addmac_4x16_16x8_conf (v64uint8 a, int sgn_x, v128uint4 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | addmsc_4x16_16x8_conf (v64uint8 a, int sgn_x, v128uint4 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | submac_4x16_16x8_conf (v64uint8 a, int sgn_x, v128uint4 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | submsc_4x16_16x8_conf (v64uint8 a, int sgn_x, v128uint4 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | mac_4x16_16x8_conf (v64uint8 a, int sgn_x, v128int4 b, int sgn_y, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | mul_4x16_16x8_conf (v64uint8 a, int sgn_x, v128int4 b, int sgn_y, int sub_mul) |
| v32acc32 | negmul_4x16_16x8_conf (v64uint8 a, int sgn_x, v128int4 b, int sgn_y, int sub_mul) |
| v32acc32 | msc_4x16_16x8_conf (v64uint8 a, int sgn_x, v128int4 b, int sgn_y, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | negmsc_4x16_16x8_conf (v64uint8 a, int sgn_x, v128int4 b, int sgn_y, v32acc32 acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32acc32 | negmac_4x16_16x8_conf (v64uint8 a, int sgn_x, v128int4 b, int sgn_y, v32acc32 acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32acc32 | addmac_4x16_16x8_conf (v64uint8 a, int sgn_x, v128int4 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | addmsc_4x16_16x8_conf (v64uint8 a, int sgn_x, v128int4 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | submac_4x16_16x8_conf (v64uint8 a, int sgn_x, v128int4 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | submsc_4x16_16x8_conf (v64uint8 a, int sgn_x, v128int4 b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 addmac_4x16_16x8 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| v32acc32 addmac_4x16_16x8 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| v32acc32 addmac_4x16_16x8 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| v32acc32 addmac_4x16_16x8 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| v32acc32 addmac_4x16_16x8_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 addmac_4x16_16x8_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 addmac_4x16_16x8_conf | ( | v64int8 | a, |
| v128int4 | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 addmac_4x16_16x8_conf | ( | v64int8 | a, |
| v128uint4 | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 addmac_4x16_16x8_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 addmac_4x16_16x8_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 addmac_4x16_16x8_conf | ( | v64uint8 | a, |
| v128int4 | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 addmac_4x16_16x8_conf | ( | v64uint8 | a, |
| v128uint4 | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 addmsc_4x16_16x8 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| v32acc32 addmsc_4x16_16x8 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| v32acc32 addmsc_4x16_16x8 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| v32acc32 addmsc_4x16_16x8 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| v32acc32 addmsc_4x16_16x8_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 addmsc_4x16_16x8_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 addmsc_4x16_16x8_conf | ( | v64int8 | a, |
| v128int4 | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 addmsc_4x16_16x8_conf | ( | v64int8 | a, |
| v128uint4 | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 addmsc_4x16_16x8_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 addmsc_4x16_16x8_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 addmsc_4x16_16x8_conf | ( | v64uint8 | a, |
| v128int4 | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 addmsc_4x16_16x8_conf | ( | v64uint8 | a, |
| v128uint4 | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| a | Matrix A |
| b | Matrix B |
| acc | Accumulator |
| a | Matrix A |
| b | Matrix B |
| acc | Accumulator |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| a | Matrix A |
| b | Matrix B |
| acc | Accumulator |
| a | Matrix A |
| b | Matrix B |
| acc | Accumulator |
| v32acc32 mac_4x16_16x8_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 mac_4x16_16x8_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 mac_4x16_16x8_conf | ( | v64int8 | a, |
| v128int4 | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 mac_4x16_16x8_conf | ( | v64int8 | a, |
| v128uint4 | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 mac_4x16_16x8_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 mac_4x16_16x8_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 mac_4x16_16x8_conf | ( | v64uint8 | a, |
| v128int4 | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 mac_4x16_16x8_conf | ( | v64uint8 | a, |
| v128uint4 | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| a | Matrix A |
| b | Matrix B |
| acc | Accumulator |
| a | Matrix A |
| b | Matrix B |
| acc | Accumulator |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| a | Matrix A |
| b | Matrix B |
| acc | Accumulator |
| a | Matrix A |
| b | Matrix B |
| acc | Accumulator |
| v32acc32 msc_4x16_16x8_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 msc_4x16_16x8_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 msc_4x16_16x8_conf | ( | v64int8 | a, |
| v128int4 | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 msc_4x16_16x8_conf | ( | v64int8 | a, |
| v128uint4 | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 msc_4x16_16x8_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 msc_4x16_16x8_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 msc_4x16_16x8_conf | ( | v64uint8 | a, |
| v128int4 | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 msc_4x16_16x8_conf | ( | v64uint8 | a, |
| v128uint4 | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| shift16 | Shift mask of input accumulator acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| sub_mul | Negation mask of multiplication result |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| sub_mul | Negation mask of multiplication result |
| a | Matrix A |
| b | Matrix B |
| sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
| a | Matrix A |
| b | Matrix B |
| sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| sub_mul | Negation mask of multiplication result |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| sub_mul | Negation mask of multiplication result |
| a | Matrix A |
| b | Matrix B |
| sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
| a | Matrix A |
| b | Matrix B |
| sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| a | Matrix A |
| b | Matrix B |
| acc | Accumulator |
| a | Matrix A |
| b | Matrix B |
| acc | Accumulator |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| a | Matrix A |
| b | Matrix B |
| acc | Accumulator |
| a | Matrix A |
| b | Matrix B |
| acc | Accumulator |
| v32acc32 negmac_4x16_16x8_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 negmac_4x16_16x8_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 negmac_4x16_16x8_conf | ( | v64int8 | a, |
| v128int4 | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 negmac_4x16_16x8_conf | ( | v64int8 | a, |
| v128uint4 | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 negmac_4x16_16x8_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 negmac_4x16_16x8_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 negmac_4x16_16x8_conf | ( | v64uint8 | a, |
| v128int4 | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 negmac_4x16_16x8_conf | ( | v64uint8 | a, |
| v128uint4 | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| a | Matrix A |
| b | Matrix B |
| acc | Accumulator |
| a | Matrix A |
| b | Matrix B |
| acc | Accumulator |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| a | Matrix A |
| b | Matrix B |
| acc | Accumulator |
| a | Matrix A |
| b | Matrix B |
| acc | Accumulator |
| v32acc32 negmsc_4x16_16x8_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 negmsc_4x16_16x8_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 negmsc_4x16_16x8_conf | ( | v64int8 | a, |
| v128int4 | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 negmsc_4x16_16x8_conf | ( | v64int8 | a, |
| v128uint4 | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 negmsc_4x16_16x8_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 negmsc_4x16_16x8_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 negmsc_4x16_16x8_conf | ( | v64uint8 | a, |
| v128int4 | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 negmsc_4x16_16x8_conf | ( | v64uint8 | a, |
| v128uint4 | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc | Input accumulator |
| zero_acc | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| sub_mul | Negation mask of multiplication result |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| sub_mul | Negation mask of multiplication result |
| a | Matrix A |
| b | Matrix B |
| sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
| a | Matrix A |
| b | Matrix B |
| sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| sub_mul | Negation mask of multiplication result |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| sub_mul | Negation mask of multiplication result |
| a | Matrix A |
| b | Matrix B |
| sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
| a | Matrix A |
| b | Matrix B |
| sub_mul | Negation mask for multiplication result. If a bit of sub_mul is set the corresponding vector lane of the output accumulator will be negated. |
| v32acc32 submac_4x16_16x8 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| v32acc32 submac_4x16_16x8 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| v32acc32 submac_4x16_16x8 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| v32acc32 submac_4x16_16x8 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| v32acc32 submac_4x16_16x8_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 submac_4x16_16x8_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 submac_4x16_16x8_conf | ( | v64int8 | a, |
| v128int4 | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 submac_4x16_16x8_conf | ( | v64int8 | a, |
| v128uint4 | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 submac_4x16_16x8_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 submac_4x16_16x8_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 submac_4x16_16x8_conf | ( | v64uint8 | a, |
| v128int4 | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 submac_4x16_16x8_conf | ( | v64uint8 | a, |
| v128uint4 | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 submsc_4x16_16x8 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| v32acc32 submsc_4x16_16x8 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| v32acc32 submsc_4x16_16x8 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| v32acc32 submsc_4x16_16x8 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| v32acc32 submsc_4x16_16x8_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 submsc_4x16_16x8_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 submsc_4x16_16x8_conf | ( | v64int8 | a, |
| v128int4 | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 submsc_4x16_16x8_conf | ( | v64int8 | a, |
| v128uint4 | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 submsc_4x16_16x8_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 submsc_4x16_16x8_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint4 | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| sgn_x | Sign mask for matrix A |
| b | Matrix B |
| sgn_y | Sign mask for matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 submsc_4x16_16x8_conf | ( | v64uint8 | a, |
| v128int4 | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |
| v32acc32 submsc_4x16_16x8_conf | ( | v64uint8 | a, |
| v128uint4 | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 | ||
| ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Input accumulator 1 |
| acc2 | Input accumulator 2 |
| zero_acc1 | Zeroing mask for acc1 |
| sub_mul | Negation mask of multiplication result |
| sub_acc1 | Negation mask of acc1 |