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AI Engine-ML v2 Intrinsics User Guide
v2025.1
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8x16_16x8T with dynamic negation of multiplication result | |
| v64acc32 | mul_8x16_16x8T_conf (v128uint8 a, v128uint8_sparse b, int sub_mul) |
| v64acc32 | negmul_8x16_16x8T_conf (v128uint8 a, v128uint8_sparse b, int sub_mul) |
| v64acc32 | mul_8x16_16x8T_conf (v128uint8 a, v128int8_sparse b, int sub_mul) |
| v64acc32 | negmul_8x16_16x8T_conf (v128uint8 a, v128int8_sparse b, int sub_mul) |
| v64acc32 | mul_8x16_16x8T_conf (v128int8 a, v128uint8_sparse b, int sub_mul) |
| v64acc32 | negmul_8x16_16x8T_conf (v128int8 a, v128uint8_sparse b, int sub_mul) |
| v64acc32 | mul_8x16_16x8T_conf (v128int8 a, v128int8_sparse b, int sub_mul) |
| v64acc32 | negmul_8x16_16x8T_conf (v128int8 a, v128int8_sparse b, int sub_mul) |
8x16_16x8T with dynamic negation of multiplication result, zeroing of acc1, negation of acc1 | |
| v64acc32 | mac_8x16_16x8T_conf (v128uint8 a, v128uint8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_8x16_16x8T_conf (v128uint8 a, v128uint8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_8x16_16x8T_conf (v128uint8 a, v128uint8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_8x16_16x8T_conf (v128uint8 a, v128uint8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mac_8x16_16x8T_conf (v128uint8 a, v128int8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_8x16_16x8T_conf (v128uint8 a, v128int8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_8x16_16x8T_conf (v128uint8 a, v128int8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_8x16_16x8T_conf (v128uint8 a, v128int8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mac_8x16_16x8T_conf (v128int8 a, v128uint8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_8x16_16x8T_conf (v128int8 a, v128uint8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_8x16_16x8T_conf (v128int8 a, v128uint8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_8x16_16x8T_conf (v128int8 a, v128uint8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mac_8x16_16x8T_conf (v128int8 a, v128int8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_8x16_16x8T_conf (v128int8 a, v128int8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_8x16_16x8T_conf (v128int8 a, v128int8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_8x16_16x8T_conf (v128int8 a, v128int8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
8x16_16x8T with dynamic sign and dynamic negation of multiplication result | |
| v64acc32 | mul_8x16_16x8T_conf (v128uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | negmul_8x16_16x8T_conf (v128uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | mac_8x16_16x8T_conf (v128uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_8x16_16x8T_conf (v128uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_8x16_16x8T_conf (v128uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_8x16_16x8T_conf (v128uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mul_8x16_16x8T_conf (v128uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | negmul_8x16_16x8T_conf (v128uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | mac_8x16_16x8T_conf (v128uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_8x16_16x8T_conf (v128uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_8x16_16x8T_conf (v128uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_8x16_16x8T_conf (v128uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mul_8x16_16x8T_conf (v128int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | negmul_8x16_16x8T_conf (v128int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | mac_8x16_16x8T_conf (v128int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_8x16_16x8T_conf (v128int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_8x16_16x8T_conf (v128int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_8x16_16x8T_conf (v128int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mul_8x16_16x8T_conf (v128int8 a, int sgn_x, v128int8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | negmul_8x16_16x8T_conf (v128int8 a, int sgn_x, v128int8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | mac_8x16_16x8T_conf (v128int8 a, int sgn_x, v128int8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_8x16_16x8T_conf (v128int8 a, int sgn_x, v128int8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_8x16_16x8T_conf (v128int8 a, int sgn_x, v128int8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_8x16_16x8T_conf (v128int8 a, int sgn_x, v128int8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
4x16_16x8T with dynamic negation of multiplication result, zeroing of acc1, negation of acc1 | |
| v32acc32 | mac_4x16_16x8T_conf (v64uint8 a, v128uint8_sparse b, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | msc_4x16_16x8T_conf (v64uint8 a, v128uint8_sparse b, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | addmac_4x16_16x8T_conf (v64uint8 a, v128uint8_sparse b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | addmsc_4x16_16x8T_conf (v64uint8 a, v128uint8_sparse b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | mac_4x16_16x8T_conf (v64uint8 a, v128int8_sparse b, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | msc_4x16_16x8T_conf (v64uint8 a, v128int8_sparse b, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | addmac_4x16_16x8T_conf (v64uint8 a, v128int8_sparse b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | addmsc_4x16_16x8T_conf (v64uint8 a, v128int8_sparse b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | mac_4x16_16x8T_conf (v64int8 a, v128uint8_sparse b, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | msc_4x16_16x8T_conf (v64int8 a, v128uint8_sparse b, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | addmac_4x16_16x8T_conf (v64int8 a, v128uint8_sparse b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | addmsc_4x16_16x8T_conf (v64int8 a, v128uint8_sparse b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | mac_4x16_16x8T_conf (v64int8 a, v128int8_sparse b, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | msc_4x16_16x8T_conf (v64int8 a, v128int8_sparse b, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | addmac_4x16_16x8T_conf (v64int8 a, v128int8_sparse b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | addmsc_4x16_16x8T_conf (v64int8 a, v128int8_sparse b, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32accfloat | mac_4x16_16x8T_conf (v64bfloat16 a, v128bfloat16_sparse b, v32accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32accfloat | msc_4x16_16x8T_conf (v64bfloat16 a, v128bfloat16_sparse b, v32accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32accfloat | addmac_4x16_16x8T_conf (v64bfloat16 a, v128bfloat16_sparse b, v32accfloat acc1, v32accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32accfloat | addmsc_4x16_16x8T_conf (v64bfloat16 a, v128bfloat16_sparse b, v32accfloat acc1, v32accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32accfloat | mac_4x16_16x8T_conf (v64bfloat16 a, v128float16_sparse b, v32accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32accfloat | msc_4x16_16x8T_conf (v64bfloat16 a, v128float16_sparse b, v32accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32accfloat | addmac_4x16_16x8T_conf (v64bfloat16 a, v128float16_sparse b, v32accfloat acc1, v32accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32accfloat | addmsc_4x16_16x8T_conf (v64bfloat16 a, v128float16_sparse b, v32accfloat acc1, v32accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32accfloat | mac_4x16_16x8T_conf (v64float16 a, v128bfloat16_sparse b, v32accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32accfloat | msc_4x16_16x8T_conf (v64float16 a, v128bfloat16_sparse b, v32accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32accfloat | addmac_4x16_16x8T_conf (v64float16 a, v128bfloat16_sparse b, v32accfloat acc1, v32accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32accfloat | addmsc_4x16_16x8T_conf (v64float16 a, v128bfloat16_sparse b, v32accfloat acc1, v32accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32accfloat | mac_4x16_16x8T_conf (v64float16 a, v128float16_sparse b, v32accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32accfloat | msc_4x16_16x8T_conf (v64float16 a, v128float16_sparse b, v32accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32accfloat | addmac_4x16_16x8T_conf (v64float16 a, v128float16_sparse b, v32accfloat acc1, v32accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32accfloat | addmsc_4x16_16x8T_conf (v64float16 a, v128float16_sparse b, v32accfloat acc1, v32accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
4x16_16x8T with dynamic sign and dynamic negation of multiplication result | |
| v32acc32 | mul_4x16_16x8T_conf (v64uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, int sub_mul) |
| v32acc32 | negmul_4x16_16x8T_conf (v64uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, int sub_mul) |
| v32acc32 | mac_4x16_16x8T_conf (v64uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | msc_4x16_16x8T_conf (v64uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | addmac_4x16_16x8T_conf (v64uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | addmsc_4x16_16x8T_conf (v64uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | mul_4x16_16x8T_conf (v64uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, int sub_mul) |
| v32acc32 | negmul_4x16_16x8T_conf (v64uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, int sub_mul) |
| v32acc32 | mac_4x16_16x8T_conf (v64uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | msc_4x16_16x8T_conf (v64uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | addmac_4x16_16x8T_conf (v64uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | addmsc_4x16_16x8T_conf (v64uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | mul_4x16_16x8T_conf (v64int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, int sub_mul) |
| v32acc32 | negmul_4x16_16x8T_conf (v64int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, int sub_mul) |
| v32acc32 | mac_4x16_16x8T_conf (v64int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | msc_4x16_16x8T_conf (v64int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | addmac_4x16_16x8T_conf (v64int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | addmsc_4x16_16x8T_conf (v64int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | mul_4x16_16x8T_conf (v64int8 a, int sgn_x, v128int8_sparse b, int sgn_y, int sub_mul) |
| v32acc32 | negmul_4x16_16x8T_conf (v64int8 a, int sgn_x, v128int8_sparse b, int sgn_y, int sub_mul) |
| v32acc32 | mac_4x16_16x8T_conf (v64int8 a, int sgn_x, v128int8_sparse b, int sgn_y, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | msc_4x16_16x8T_conf (v64int8 a, int sgn_x, v128int8_sparse b, int sgn_y, v32acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc32 | addmac_4x16_16x8T_conf (v64int8 a, int sgn_x, v128int8_sparse b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc32 | addmsc_4x16_16x8T_conf (v64int8 a, int sgn_x, v128int8_sparse b, int sgn_y, v32acc32 acc1, v32acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32accfloat | mul_4x16_16x8T_conf (v64bfloat16 a, int sgn_x, v128bfloat16_sparse b, int sgn_y, int sub_mul) |
| v32accfloat | negmul_4x16_16x8T_conf (v64bfloat16 a, int sgn_x, v128bfloat16_sparse b, int sgn_y, int sub_mul) |
| v32accfloat | mac_4x16_16x8T_conf (v64bfloat16 a, int sgn_x, v128bfloat16_sparse b, int sgn_y, v32accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32accfloat | msc_4x16_16x8T_conf (v64bfloat16 a, int sgn_x, v128bfloat16_sparse b, int sgn_y, v32accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32accfloat | addmac_4x16_16x8T_conf (v64bfloat16 a, int sgn_x, v128bfloat16_sparse b, int sgn_y, v32accfloat acc1, v32accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32accfloat | addmsc_4x16_16x8T_conf (v64bfloat16 a, int sgn_x, v128bfloat16_sparse b, int sgn_y, v32accfloat acc1, v32accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32accfloat | mul_4x16_16x8T_conf (v64bfloat16 a, int sgn_x, v128float16_sparse b, int sgn_y, int sub_mul) |
| v32accfloat | negmul_4x16_16x8T_conf (v64bfloat16 a, int sgn_x, v128float16_sparse b, int sgn_y, int sub_mul) |
| v32accfloat | mac_4x16_16x8T_conf (v64bfloat16 a, int sgn_x, v128float16_sparse b, int sgn_y, v32accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32accfloat | msc_4x16_16x8T_conf (v64bfloat16 a, int sgn_x, v128float16_sparse b, int sgn_y, v32accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32accfloat | addmac_4x16_16x8T_conf (v64bfloat16 a, int sgn_x, v128float16_sparse b, int sgn_y, v32accfloat acc1, v32accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32accfloat | addmsc_4x16_16x8T_conf (v64bfloat16 a, int sgn_x, v128float16_sparse b, int sgn_y, v32accfloat acc1, v32accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32accfloat | mul_4x16_16x8T_conf (v64float16 a, int sgn_x, v128bfloat16_sparse b, int sgn_y, int sub_mul) |
| v32accfloat | negmul_4x16_16x8T_conf (v64float16 a, int sgn_x, v128bfloat16_sparse b, int sgn_y, int sub_mul) |
| v32accfloat | mac_4x16_16x8T_conf (v64float16 a, int sgn_x, v128bfloat16_sparse b, int sgn_y, v32accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32accfloat | msc_4x16_16x8T_conf (v64float16 a, int sgn_x, v128bfloat16_sparse b, int sgn_y, v32accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32accfloat | addmac_4x16_16x8T_conf (v64float16 a, int sgn_x, v128bfloat16_sparse b, int sgn_y, v32accfloat acc1, v32accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32accfloat | addmsc_4x16_16x8T_conf (v64float16 a, int sgn_x, v128bfloat16_sparse b, int sgn_y, v32accfloat acc1, v32accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32accfloat | mul_4x16_16x8T_conf (v64float16 a, int sgn_x, v128float16_sparse b, int sgn_y, int sub_mul) |
| v32accfloat | negmul_4x16_16x8T_conf (v64float16 a, int sgn_x, v128float16_sparse b, int sgn_y, int sub_mul) |
| v32accfloat | mac_4x16_16x8T_conf (v64float16 a, int sgn_x, v128float16_sparse b, int sgn_y, v32accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32accfloat | msc_4x16_16x8T_conf (v64float16 a, int sgn_x, v128float16_sparse b, int sgn_y, v32accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v32accfloat | addmac_4x16_16x8T_conf (v64float16 a, int sgn_x, v128float16_sparse b, int sgn_y, v32accfloat acc1, v32accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v32accfloat | addmsc_4x16_16x8T_conf (v64float16 a, int sgn_x, v128float16_sparse b, int sgn_y, v32accfloat acc1, v32accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
4x16_16x16T with dynamic negation of multiplication result, zeroing of acc1, negation of acc1 | |
| v64acc32 | mac_4x16_16x16T_conf (v64uint8 a, v256uint8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_4x16_16x16T_conf (v64uint8 a, v256uint8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_4x16_16x16T_conf (v64uint8 a, v256uint8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_4x16_16x16T_conf (v64uint8 a, v256uint8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mac_4x16_16x16T_conf (v64uint8 a, v256int8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_4x16_16x16T_conf (v64uint8 a, v256int8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_4x16_16x16T_conf (v64uint8 a, v256int8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_4x16_16x16T_conf (v64uint8 a, v256int8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mac_4x16_16x16T_conf (v64int8 a, v256uint8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_4x16_16x16T_conf (v64int8 a, v256uint8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_4x16_16x16T_conf (v64int8 a, v256uint8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_4x16_16x16T_conf (v64int8 a, v256uint8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mac_4x16_16x16T_conf (v64int8 a, v256int8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_4x16_16x16T_conf (v64int8 a, v256int8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_4x16_16x16T_conf (v64int8 a, v256int8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_4x16_16x16T_conf (v64int8 a, v256int8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64accfloat | mac_4x16_16x16T_conf (v64float8 a, v256float8_sparse b, v64accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v64accfloat | msc_4x16_16x16T_conf (v64float8 a, v256float8_sparse b, v64accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v64accfloat | addmac_4x16_16x16T_conf (v64float8 a, v256float8_sparse b, v64accfloat acc1, v64accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v64accfloat | addmsc_4x16_16x16T_conf (v64float8 a, v256float8_sparse b, v64accfloat acc1, v64accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v64accfloat | mac_4x16_16x16T_conf (v64float8 a, v256bfloat8_sparse b, v64accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v64accfloat | msc_4x16_16x16T_conf (v64float8 a, v256bfloat8_sparse b, v64accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v64accfloat | addmac_4x16_16x16T_conf (v64float8 a, v256bfloat8_sparse b, v64accfloat acc1, v64accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v64accfloat | addmsc_4x16_16x16T_conf (v64float8 a, v256bfloat8_sparse b, v64accfloat acc1, v64accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v64accfloat | mac_4x16_16x16T_conf (v64bfloat8 a, v256float8_sparse b, v64accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v64accfloat | msc_4x16_16x16T_conf (v64bfloat8 a, v256float8_sparse b, v64accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v64accfloat | addmac_4x16_16x16T_conf (v64bfloat8 a, v256float8_sparse b, v64accfloat acc1, v64accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v64accfloat | addmsc_4x16_16x16T_conf (v64bfloat8 a, v256float8_sparse b, v64accfloat acc1, v64accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v64accfloat | mac_4x16_16x16T_conf (v64bfloat8 a, v256bfloat8_sparse b, v64accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v64accfloat | msc_4x16_16x16T_conf (v64bfloat8 a, v256bfloat8_sparse b, v64accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v64accfloat | addmac_4x16_16x16T_conf (v64bfloat8 a, v256bfloat8_sparse b, v64accfloat acc1, v64accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v64accfloat | addmsc_4x16_16x16T_conf (v64bfloat8 a, v256bfloat8_sparse b, v64accfloat acc1, v64accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
4x16_16x16T with dynamic sign and dynamic negation of multiplication result | |
| v64acc32 | mul_4x16_16x16T_conf (v64uint8 a, int sgn_x, v256uint8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | negmul_4x16_16x16T_conf (v64uint8 a, int sgn_x, v256uint8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | mac_4x16_16x16T_conf (v64uint8 a, int sgn_x, v256uint8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_4x16_16x16T_conf (v64uint8 a, int sgn_x, v256uint8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_4x16_16x16T_conf (v64uint8 a, int sgn_x, v256uint8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_4x16_16x16T_conf (v64uint8 a, int sgn_x, v256uint8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mul_4x16_16x16T_conf (v64uint8 a, int sgn_x, v256int8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | negmul_4x16_16x16T_conf (v64uint8 a, int sgn_x, v256int8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | mac_4x16_16x16T_conf (v64uint8 a, int sgn_x, v256int8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_4x16_16x16T_conf (v64uint8 a, int sgn_x, v256int8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_4x16_16x16T_conf (v64uint8 a, int sgn_x, v256int8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_4x16_16x16T_conf (v64uint8 a, int sgn_x, v256int8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mul_4x16_16x16T_conf (v64int8 a, int sgn_x, v256uint8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | negmul_4x16_16x16T_conf (v64int8 a, int sgn_x, v256uint8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | mac_4x16_16x16T_conf (v64int8 a, int sgn_x, v256uint8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_4x16_16x16T_conf (v64int8 a, int sgn_x, v256uint8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_4x16_16x16T_conf (v64int8 a, int sgn_x, v256uint8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_4x16_16x16T_conf (v64int8 a, int sgn_x, v256uint8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mul_4x16_16x16T_conf (v64int8 a, int sgn_x, v256int8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | negmul_4x16_16x16T_conf (v64int8 a, int sgn_x, v256int8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | mac_4x16_16x16T_conf (v64int8 a, int sgn_x, v256int8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_4x16_16x16T_conf (v64int8 a, int sgn_x, v256int8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_4x16_16x16T_conf (v64int8 a, int sgn_x, v256int8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_4x16_16x16T_conf (v64int8 a, int sgn_x, v256int8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64accfloat | mul_4x16_16x16T_conf (v64float8 a, int sgn_x, v256float8_sparse b, int sgn_y, int sub_mul) |
| v64accfloat | negmul_4x16_16x16T_conf (v64float8 a, int sgn_x, v256float8_sparse b, int sgn_y, int sub_mul) |
| v64accfloat | mac_4x16_16x16T_conf (v64float8 a, int sgn_x, v256float8_sparse b, int sgn_y, v64accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v64accfloat | msc_4x16_16x16T_conf (v64float8 a, int sgn_x, v256float8_sparse b, int sgn_y, v64accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v64accfloat | addmac_4x16_16x16T_conf (v64float8 a, int sgn_x, v256float8_sparse b, int sgn_y, v64accfloat acc1, v64accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v64accfloat | addmsc_4x16_16x16T_conf (v64float8 a, int sgn_x, v256float8_sparse b, int sgn_y, v64accfloat acc1, v64accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v64accfloat | mul_4x16_16x16T_conf (v64float8 a, int sgn_x, v256bfloat8_sparse b, int sgn_y, int sub_mul) |
| v64accfloat | negmul_4x16_16x16T_conf (v64float8 a, int sgn_x, v256bfloat8_sparse b, int sgn_y, int sub_mul) |
| v64accfloat | mac_4x16_16x16T_conf (v64float8 a, int sgn_x, v256bfloat8_sparse b, int sgn_y, v64accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v64accfloat | msc_4x16_16x16T_conf (v64float8 a, int sgn_x, v256bfloat8_sparse b, int sgn_y, v64accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v64accfloat | addmac_4x16_16x16T_conf (v64float8 a, int sgn_x, v256bfloat8_sparse b, int sgn_y, v64accfloat acc1, v64accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v64accfloat | addmsc_4x16_16x16T_conf (v64float8 a, int sgn_x, v256bfloat8_sparse b, int sgn_y, v64accfloat acc1, v64accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v64accfloat | mul_4x16_16x16T_conf (v64bfloat8 a, int sgn_x, v256float8_sparse b, int sgn_y, int sub_mul) |
| v64accfloat | negmul_4x16_16x16T_conf (v64bfloat8 a, int sgn_x, v256float8_sparse b, int sgn_y, int sub_mul) |
| v64accfloat | mac_4x16_16x16T_conf (v64bfloat8 a, int sgn_x, v256float8_sparse b, int sgn_y, v64accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v64accfloat | msc_4x16_16x16T_conf (v64bfloat8 a, int sgn_x, v256float8_sparse b, int sgn_y, v64accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v64accfloat | addmac_4x16_16x16T_conf (v64bfloat8 a, int sgn_x, v256float8_sparse b, int sgn_y, v64accfloat acc1, v64accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v64accfloat | addmsc_4x16_16x16T_conf (v64bfloat8 a, int sgn_x, v256float8_sparse b, int sgn_y, v64accfloat acc1, v64accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v64accfloat | mul_4x16_16x16T_conf (v64bfloat8 a, int sgn_x, v256bfloat8_sparse b, int sgn_y, int sub_mul) |
| v64accfloat | negmul_4x16_16x16T_conf (v64bfloat8 a, int sgn_x, v256bfloat8_sparse b, int sgn_y, int sub_mul) |
| v64accfloat | mac_4x16_16x16T_conf (v64bfloat8 a, int sgn_x, v256bfloat8_sparse b, int sgn_y, v64accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v64accfloat | msc_4x16_16x16T_conf (v64bfloat8 a, int sgn_x, v256bfloat8_sparse b, int sgn_y, v64accfloat acc, int zero_acc, int sub_mul, int sub_acc1) |
| v64accfloat | addmac_4x16_16x16T_conf (v64bfloat8 a, int sgn_x, v256bfloat8_sparse b, int sgn_y, v64accfloat acc1, v64accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
| v64accfloat | addmsc_4x16_16x16T_conf (v64bfloat8 a, int sgn_x, v256bfloat8_sparse b, int sgn_y, v64accfloat acc1, v64accfloat acc2, int zero_acc1, int sub_mul, int sub_acc1, int sub_acc2) |
4x8_8x8T with dynamic negation of multiplication result | |
| v32acc64 | mul_4x8_8x8T_conf (v32uint16 a, v64uint16_sparse b, int sub_mul) |
| v32acc64 | negmul_4x8_8x8T_conf (v32uint16 a, v64uint16_sparse b, int sub_mul) |
| v32acc64 | mul_4x8_8x8T_conf (v32uint16 a, v64int16_sparse b, int sub_mul) |
| v32acc64 | negmul_4x8_8x8T_conf (v32uint16 a, v64int16_sparse b, int sub_mul) |
| v32acc64 | mul_4x8_8x8T_conf (v32int16 a, v64uint16_sparse b, int sub_mul) |
| v32acc64 | negmul_4x8_8x8T_conf (v32int16 a, v64uint16_sparse b, int sub_mul) |
| v32acc64 | mul_4x8_8x8T_conf (v32int16 a, v64int16_sparse b, int sub_mul) |
| v32acc64 | negmul_4x8_8x8T_conf (v32int16 a, v64int16_sparse b, int sub_mul) |
4x8_8x8T with dynamic negation of multiplication result, zeroing of acc1, negation of acc1 | |
| v32acc64 | mac_4x8_8x8T_conf (v32uint16 a, v64uint16_sparse b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | msc_4x8_8x8T_conf (v32uint16 a, v64uint16_sparse b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | addmac_4x8_8x8T_conf (v32uint16 a, v64uint16_sparse b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | addmsc_4x8_8x8T_conf (v32uint16 a, v64uint16_sparse b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | mac_4x8_8x8T_conf (v32uint16 a, v64int16_sparse b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | msc_4x8_8x8T_conf (v32uint16 a, v64int16_sparse b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | addmac_4x8_8x8T_conf (v32uint16 a, v64int16_sparse b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | addmsc_4x8_8x8T_conf (v32uint16 a, v64int16_sparse b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | mac_4x8_8x8T_conf (v32int16 a, v64uint16_sparse b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | msc_4x8_8x8T_conf (v32int16 a, v64uint16_sparse b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | addmac_4x8_8x8T_conf (v32int16 a, v64uint16_sparse b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | addmsc_4x8_8x8T_conf (v32int16 a, v64uint16_sparse b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | mac_4x8_8x8T_conf (v32int16 a, v64int16_sparse b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | msc_4x8_8x8T_conf (v32int16 a, v64int16_sparse b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | addmac_4x8_8x8T_conf (v32int16 a, v64int16_sparse b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | addmsc_4x8_8x8T_conf (v32int16 a, v64int16_sparse b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
4x8_8x8T with dynamic sign and dynamic negation of multiplication result | |
| v32acc64 | mul_4x8_8x8T_conf (v32uint16 a, int sgn_x, v64uint16_sparse b, int sgn_y, int sub_mul) |
| v32acc64 | negmul_4x8_8x8T_conf (v32uint16 a, int sgn_x, v64uint16_sparse b, int sgn_y, int sub_mul) |
| v32acc64 | mac_4x8_8x8T_conf (v32uint16 a, int sgn_x, v64uint16_sparse b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | msc_4x8_8x8T_conf (v32uint16 a, int sgn_x, v64uint16_sparse b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | addmac_4x8_8x8T_conf (v32uint16 a, int sgn_x, v64uint16_sparse b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | addmsc_4x8_8x8T_conf (v32uint16 a, int sgn_x, v64uint16_sparse b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | mul_4x8_8x8T_conf (v32uint16 a, int sgn_x, v64int16_sparse b, int sgn_y, int sub_mul) |
| v32acc64 | negmul_4x8_8x8T_conf (v32uint16 a, int sgn_x, v64int16_sparse b, int sgn_y, int sub_mul) |
| v32acc64 | mac_4x8_8x8T_conf (v32uint16 a, int sgn_x, v64int16_sparse b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | msc_4x8_8x8T_conf (v32uint16 a, int sgn_x, v64int16_sparse b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | addmac_4x8_8x8T_conf (v32uint16 a, int sgn_x, v64int16_sparse b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | addmsc_4x8_8x8T_conf (v32uint16 a, int sgn_x, v64int16_sparse b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | mul_4x8_8x8T_conf (v32int16 a, int sgn_x, v64uint16_sparse b, int sgn_y, int sub_mul) |
| v32acc64 | negmul_4x8_8x8T_conf (v32int16 a, int sgn_x, v64uint16_sparse b, int sgn_y, int sub_mul) |
| v32acc64 | mac_4x8_8x8T_conf (v32int16 a, int sgn_x, v64uint16_sparse b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | msc_4x8_8x8T_conf (v32int16 a, int sgn_x, v64uint16_sparse b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | addmac_4x8_8x8T_conf (v32int16 a, int sgn_x, v64uint16_sparse b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | addmsc_4x8_8x8T_conf (v32int16 a, int sgn_x, v64uint16_sparse b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | mul_4x8_8x8T_conf (v32int16 a, int sgn_x, v64int16_sparse b, int sgn_y, int sub_mul) |
| v32acc64 | negmul_4x8_8x8T_conf (v32int16 a, int sgn_x, v64int16_sparse b, int sgn_y, int sub_mul) |
| v32acc64 | mac_4x8_8x8T_conf (v32int16 a, int sgn_x, v64int16_sparse b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | msc_4x8_8x8T_conf (v32int16 a, int sgn_x, v64int16_sparse b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | addmac_4x8_8x8T_conf (v32int16 a, int sgn_x, v64int16_sparse b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | addmsc_4x8_8x8T_conf (v32int16 a, int sgn_x, v64int16_sparse b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
8x16_16x8 with dynamic negation of multiplication result | |
| v64acc32 | mul_8x16_16x8_conf (v128uint8 a, v128uint8_sparse b, int sub_mul) |
| v64acc32 | negmul_8x16_16x8_conf (v128uint8 a, v128uint8_sparse b, int sub_mul) |
| v64acc32 | mul_8x16_16x8_conf (v128uint8 a, v128int8_sparse b, int sub_mul) |
| v64acc32 | negmul_8x16_16x8_conf (v128uint8 a, v128int8_sparse b, int sub_mul) |
| v64acc32 | mul_8x16_16x8_conf (v128int8 a, v128uint8_sparse b, int sub_mul) |
| v64acc32 | negmul_8x16_16x8_conf (v128int8 a, v128uint8_sparse b, int sub_mul) |
| v64acc32 | mul_8x16_16x8_conf (v128int8 a, v128int8_sparse b, int sub_mul) |
| v64acc32 | negmul_8x16_16x8_conf (v128int8 a, v128int8_sparse b, int sub_mul) |
8x16_16x8 with dynamic negation of multiplication result, zeroing of acc1, negation of acc1 | |
| v64acc32 | mac_8x16_16x8_conf (v128uint8 a, v128uint8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_8x16_16x8_conf (v128uint8 a, v128uint8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_8x16_16x8_conf (v128uint8 a, v128uint8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_8x16_16x8_conf (v128uint8 a, v128uint8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mac_8x16_16x8_conf (v128uint8 a, v128int8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_8x16_16x8_conf (v128uint8 a, v128int8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_8x16_16x8_conf (v128uint8 a, v128int8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_8x16_16x8_conf (v128uint8 a, v128int8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mac_8x16_16x8_conf (v128int8 a, v128uint8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_8x16_16x8_conf (v128int8 a, v128uint8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_8x16_16x8_conf (v128int8 a, v128uint8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_8x16_16x8_conf (v128int8 a, v128uint8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mac_8x16_16x8_conf (v128int8 a, v128int8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_8x16_16x8_conf (v128int8 a, v128int8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_8x16_16x8_conf (v128int8 a, v128int8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_8x16_16x8_conf (v128int8 a, v128int8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
8x16_16x8 with dynamic sign and dynamic negation of multiplication result | |
| v64acc32 | mul_8x16_16x8_conf (v128uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | negmul_8x16_16x8_conf (v128uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | mac_8x16_16x8_conf (v128uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_8x16_16x8_conf (v128uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_8x16_16x8_conf (v128uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_8x16_16x8_conf (v128uint8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mul_8x16_16x8_conf (v128uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | negmul_8x16_16x8_conf (v128uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | mac_8x16_16x8_conf (v128uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_8x16_16x8_conf (v128uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_8x16_16x8_conf (v128uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_8x16_16x8_conf (v128uint8 a, int sgn_x, v128int8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mul_8x16_16x8_conf (v128int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | negmul_8x16_16x8_conf (v128int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | mac_8x16_16x8_conf (v128int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_8x16_16x8_conf (v128int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_8x16_16x8_conf (v128int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_8x16_16x8_conf (v128int8 a, int sgn_x, v128uint8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mul_8x16_16x8_conf (v128int8 a, int sgn_x, v128int8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | negmul_8x16_16x8_conf (v128int8 a, int sgn_x, v128int8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | mac_8x16_16x8_conf (v128int8 a, int sgn_x, v128int8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_8x16_16x8_conf (v128int8 a, int sgn_x, v128int8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_8x16_16x8_conf (v128int8 a, int sgn_x, v128int8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_8x16_16x8_conf (v128int8 a, int sgn_x, v128int8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
4x16_16x16 with dynamic negation of multiplication result | |
| v64acc32 | mul_4x16_16x16_conf (v64uint8 a, v256uint8_sparse b, int sub_mul) |
| v64acc32 | negmul_4x16_16x16_conf (v64uint8 a, v256uint8_sparse b, int sub_mul) |
| v64acc32 | mul_4x16_16x16_conf (v64uint8 a, v256int8_sparse b, int sub_mul) |
| v64acc32 | negmul_4x16_16x16_conf (v64uint8 a, v256int8_sparse b, int sub_mul) |
| v64acc32 | mul_4x16_16x16_conf (v64int8 a, v256uint8_sparse b, int sub_mul) |
| v64acc32 | negmul_4x16_16x16_conf (v64int8 a, v256uint8_sparse b, int sub_mul) |
| v64acc32 | mul_4x16_16x16_conf (v64int8 a, v256int8_sparse b, int sub_mul) |
| v64acc32 | negmul_4x16_16x16_conf (v64int8 a, v256int8_sparse b, int sub_mul) |
4x16_16x16 with dynamic negation of multiplication result, zeroing of acc1, negation of acc1 | |
| v64acc32 | mac_4x16_16x16_conf (v64uint8 a, v256uint8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_4x16_16x16_conf (v64uint8 a, v256uint8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_4x16_16x16_conf (v64uint8 a, v256uint8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_4x16_16x16_conf (v64uint8 a, v256uint8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mac_4x16_16x16_conf (v64uint8 a, v256int8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_4x16_16x16_conf (v64uint8 a, v256int8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_4x16_16x16_conf (v64uint8 a, v256int8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_4x16_16x16_conf (v64uint8 a, v256int8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mac_4x16_16x16_conf (v64int8 a, v256uint8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_4x16_16x16_conf (v64int8 a, v256uint8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_4x16_16x16_conf (v64int8 a, v256uint8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_4x16_16x16_conf (v64int8 a, v256uint8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mac_4x16_16x16_conf (v64int8 a, v256int8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_4x16_16x16_conf (v64int8 a, v256int8_sparse b, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_4x16_16x16_conf (v64int8 a, v256int8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_4x16_16x16_conf (v64int8 a, v256int8_sparse b, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
4x16_16x16 with dynamic sign and dynamic negation of multiplication result | |
| v64acc32 | mul_4x16_16x16_conf (v64uint8 a, int sgn_x, v256uint8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | negmul_4x16_16x16_conf (v64uint8 a, int sgn_x, v256uint8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | mac_4x16_16x16_conf (v64uint8 a, int sgn_x, v256uint8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_4x16_16x16_conf (v64uint8 a, int sgn_x, v256uint8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_4x16_16x16_conf (v64uint8 a, int sgn_x, v256uint8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_4x16_16x16_conf (v64uint8 a, int sgn_x, v256uint8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mul_4x16_16x16_conf (v64uint8 a, int sgn_x, v256int8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | negmul_4x16_16x16_conf (v64uint8 a, int sgn_x, v256int8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | mac_4x16_16x16_conf (v64uint8 a, int sgn_x, v256int8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_4x16_16x16_conf (v64uint8 a, int sgn_x, v256int8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_4x16_16x16_conf (v64uint8 a, int sgn_x, v256int8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_4x16_16x16_conf (v64uint8 a, int sgn_x, v256int8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mul_4x16_16x16_conf (v64int8 a, int sgn_x, v256uint8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | negmul_4x16_16x16_conf (v64int8 a, int sgn_x, v256uint8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | mac_4x16_16x16_conf (v64int8 a, int sgn_x, v256uint8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_4x16_16x16_conf (v64int8 a, int sgn_x, v256uint8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_4x16_16x16_conf (v64int8 a, int sgn_x, v256uint8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_4x16_16x16_conf (v64int8 a, int sgn_x, v256uint8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | mul_4x16_16x16_conf (v64int8 a, int sgn_x, v256int8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | negmul_4x16_16x16_conf (v64int8 a, int sgn_x, v256int8_sparse b, int sgn_y, int sub_mul) |
| v64acc32 | mac_4x16_16x16_conf (v64int8 a, int sgn_x, v256int8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | msc_4x16_16x16_conf (v64int8 a, int sgn_x, v256int8_sparse b, int sgn_y, v64acc32 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v64acc32 | addmac_4x16_16x16_conf (v64int8 a, int sgn_x, v256int8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 | addmsc_4x16_16x16_conf (v64int8 a, int sgn_x, v256int8_sparse b, int sgn_y, v64acc32 acc1, v64acc32 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
4x8_8x8 with dynamic negation of multiplication result | |
| v32acc64 | mul_4x8_8x8_conf (v32uint16 a, v64uint16_sparse b, int sub_mul) |
| v32acc64 | negmul_4x8_8x8_conf (v32uint16 a, v64uint16_sparse b, int sub_mul) |
| v32acc64 | mul_4x8_8x8_conf (v32uint16 a, v64int16_sparse b, int sub_mul) |
| v32acc64 | negmul_4x8_8x8_conf (v32uint16 a, v64int16_sparse b, int sub_mul) |
| v32acc64 | mul_4x8_8x8_conf (v32int16 a, v64uint16_sparse b, int sub_mul) |
| v32acc64 | negmul_4x8_8x8_conf (v32int16 a, v64uint16_sparse b, int sub_mul) |
| v32acc64 | mul_4x8_8x8_conf (v32int16 a, v64int16_sparse b, int sub_mul) |
| v32acc64 | negmul_4x8_8x8_conf (v32int16 a, v64int16_sparse b, int sub_mul) |
4x8_8x8 with dynamic negation of multiplication result, zeroing of acc1, negation of acc1 | |
| v32acc64 | mac_4x8_8x8_conf (v32uint16 a, v64uint16_sparse b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | msc_4x8_8x8_conf (v32uint16 a, v64uint16_sparse b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | addmac_4x8_8x8_conf (v32uint16 a, v64uint16_sparse b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | addmsc_4x8_8x8_conf (v32uint16 a, v64uint16_sparse b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | mac_4x8_8x8_conf (v32uint16 a, v64int16_sparse b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | msc_4x8_8x8_conf (v32uint16 a, v64int16_sparse b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | addmac_4x8_8x8_conf (v32uint16 a, v64int16_sparse b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | addmsc_4x8_8x8_conf (v32uint16 a, v64int16_sparse b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | mac_4x8_8x8_conf (v32int16 a, v64uint16_sparse b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | msc_4x8_8x8_conf (v32int16 a, v64uint16_sparse b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | addmac_4x8_8x8_conf (v32int16 a, v64uint16_sparse b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | addmsc_4x8_8x8_conf (v32int16 a, v64uint16_sparse b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | mac_4x8_8x8_conf (v32int16 a, v64int16_sparse b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | msc_4x8_8x8_conf (v32int16 a, v64int16_sparse b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | addmac_4x8_8x8_conf (v32int16 a, v64int16_sparse b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | addmsc_4x8_8x8_conf (v32int16 a, v64int16_sparse b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
4x8_8x8 with dynamic sign and dynamic negation of multiplication result | |
| v32acc64 | mul_4x8_8x8_conf (v32uint16 a, int sgn_x, v64uint16_sparse b, int sgn_y, int sub_mul) |
| v32acc64 | negmul_4x8_8x8_conf (v32uint16 a, int sgn_x, v64uint16_sparse b, int sgn_y, int sub_mul) |
| v32acc64 | mac_4x8_8x8_conf (v32uint16 a, int sgn_x, v64uint16_sparse b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | msc_4x8_8x8_conf (v32uint16 a, int sgn_x, v64uint16_sparse b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | addmac_4x8_8x8_conf (v32uint16 a, int sgn_x, v64uint16_sparse b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | addmsc_4x8_8x8_conf (v32uint16 a, int sgn_x, v64uint16_sparse b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | mul_4x8_8x8_conf (v32uint16 a, int sgn_x, v64int16_sparse b, int sgn_y, int sub_mul) |
| v32acc64 | negmul_4x8_8x8_conf (v32uint16 a, int sgn_x, v64int16_sparse b, int sgn_y, int sub_mul) |
| v32acc64 | mac_4x8_8x8_conf (v32uint16 a, int sgn_x, v64int16_sparse b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | msc_4x8_8x8_conf (v32uint16 a, int sgn_x, v64int16_sparse b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | addmac_4x8_8x8_conf (v32uint16 a, int sgn_x, v64int16_sparse b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | addmsc_4x8_8x8_conf (v32uint16 a, int sgn_x, v64int16_sparse b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | mul_4x8_8x8_conf (v32int16 a, int sgn_x, v64uint16_sparse b, int sgn_y, int sub_mul) |
| v32acc64 | negmul_4x8_8x8_conf (v32int16 a, int sgn_x, v64uint16_sparse b, int sgn_y, int sub_mul) |
| v32acc64 | mac_4x8_8x8_conf (v32int16 a, int sgn_x, v64uint16_sparse b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | msc_4x8_8x8_conf (v32int16 a, int sgn_x, v64uint16_sparse b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | addmac_4x8_8x8_conf (v32int16 a, int sgn_x, v64uint16_sparse b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | addmsc_4x8_8x8_conf (v32int16 a, int sgn_x, v64uint16_sparse b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | mul_4x8_8x8_conf (v32int16 a, int sgn_x, v64int16_sparse b, int sgn_y, int sub_mul) |
| v32acc64 | negmul_4x8_8x8_conf (v32int16 a, int sgn_x, v64int16_sparse b, int sgn_y, int sub_mul) |
| v32acc64 | mac_4x8_8x8_conf (v32int16 a, int sgn_x, v64int16_sparse b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | msc_4x8_8x8_conf (v32int16 a, int sgn_x, v64int16_sparse b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1) |
| v32acc64 | addmac_4x8_8x8_conf (v32int16 a, int sgn_x, v64int16_sparse b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v32acc64 | addmsc_4x8_8x8_conf (v32int16 a, int sgn_x, v64int16_sparse b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2) |
| v64acc32 addmac_4x16_16x16 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_4x16_16x16 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_4x16_16x16 | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_4x16_16x16 | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_4x16_16x16 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_4x16_16x16 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_4x16_16x16 | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_4x16_16x16 | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_4x16_16x16_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_4x16_16x16_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_4x16_16x16_conf | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_4x16_16x16_conf | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_4x16_16x16_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_4x16_16x16_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_4x16_16x16_conf | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_4x16_16x16_conf | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64accfloat addmac_4x16_16x16T | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2 ) |
| v64accfloat addmac_4x16_16x16T | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2 ) |
| v64accfloat addmac_4x16_16x16T | ( | v64bfloat8 | a, |
| v256bfloat8_sparse | b, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2 ) |
| v64accfloat addmac_4x16_16x16T | ( | v64bfloat8 | a, |
| v256float8_sparse | b, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2 ) |
| v64accfloat addmac_4x16_16x16T | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2 ) |
| v64accfloat addmac_4x16_16x16T | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2 ) |
| v64accfloat addmac_4x16_16x16T | ( | v64float8 | a, |
| v256bfloat8_sparse | b, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2 ) |
| v64accfloat addmac_4x16_16x16T | ( | v64float8 | a, |
| v256float8_sparse | b, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2 ) |
| v64acc32 addmac_4x16_16x16T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_4x16_16x16T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_4x16_16x16T | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_4x16_16x16T | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_4x16_16x16T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_4x16_16x16T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_4x16_16x16T | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_4x16_16x16T | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64accfloat addmac_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64accfloat addmac_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64accfloat addmac_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| v256bfloat8_sparse | b, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64accfloat addmac_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| v256float8_sparse | b, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64accfloat addmac_4x16_16x16T_conf | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64accfloat addmac_4x16_16x16T_conf | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64accfloat addmac_4x16_16x16T_conf | ( | v64float8 | a, |
| v256bfloat8_sparse | b, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64accfloat addmac_4x16_16x16T_conf | ( | v64float8 | a, |
| v256float8_sparse | b, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_4x16_16x16T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_4x16_16x16T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_4x16_16x16T_conf | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_4x16_16x16T_conf | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_4x16_16x16T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_4x16_16x16T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_4x16_16x16T_conf | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_4x16_16x16T_conf | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32accfloat addmac_4x16_16x8T | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2 ) |
| v32accfloat addmac_4x16_16x8T | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2 ) |
| v32accfloat addmac_4x16_16x8T | ( | v64bfloat16 | a, |
| v128bfloat16_sparse | b, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2 ) |
| v32accfloat addmac_4x16_16x8T | ( | v64bfloat16 | a, |
| v128float16_sparse | b, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2 ) |
| v32accfloat addmac_4x16_16x8T | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2 ) |
| v32accfloat addmac_4x16_16x8T | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2 ) |
| v32accfloat addmac_4x16_16x8T | ( | v64float16 | a, |
| v128bfloat16_sparse | b, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2 ) |
| v32accfloat addmac_4x16_16x8T | ( | v64float16 | a, |
| v128float16_sparse | b, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2 ) |
| v32acc32 addmac_4x16_16x8T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 ) |
| v32acc32 addmac_4x16_16x8T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 ) |
| v32acc32 addmac_4x16_16x8T | ( | v64int8 | a, |
| v128int8_sparse | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 ) |
| v32acc32 addmac_4x16_16x8T | ( | v64int8 | a, |
| v128uint8_sparse | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 ) |
| v32acc32 addmac_4x16_16x8T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 ) |
| v32acc32 addmac_4x16_16x8T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 ) |
| v32acc32 addmac_4x16_16x8T | ( | v64uint8 | a, |
| v128int8_sparse | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 ) |
| v32acc32 addmac_4x16_16x8T | ( | v64uint8 | a, |
| v128uint8_sparse | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 ) |
| v32accfloat addmac_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32accfloat addmac_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32accfloat addmac_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| v128bfloat16_sparse | b, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32accfloat addmac_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| v128float16_sparse | b, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32accfloat addmac_4x16_16x8T_conf | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32accfloat addmac_4x16_16x8T_conf | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32accfloat addmac_4x16_16x8T_conf | ( | v64float16 | a, |
| v128bfloat16_sparse | b, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32accfloat addmac_4x16_16x8T_conf | ( | v64float16 | a, |
| v128float16_sparse | b, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc32 addmac_4x16_16x8T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc32 addmac_4x16_16x8T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc32 addmac_4x16_16x8T_conf | ( | v64int8 | a, |
| v128int8_sparse | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc32 addmac_4x16_16x8T_conf | ( | v64int8 | a, |
| v128uint8_sparse | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc32 addmac_4x16_16x8T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc32 addmac_4x16_16x8T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc32 addmac_4x16_16x8T_conf | ( | v64uint8 | a, |
| v128int8_sparse | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc32 addmac_4x16_16x8T_conf | ( | v64uint8 | a, |
| v128uint8_sparse | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmac_4x8_8x8 | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmac_4x8_8x8 | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmac_4x8_8x8 | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmac_4x8_8x8 | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmac_4x8_8x8 | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmac_4x8_8x8 | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmac_4x8_8x8 | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmac_4x8_8x8 | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmac_4x8_8x8_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmac_4x8_8x8_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmac_4x8_8x8_conf | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmac_4x8_8x8_conf | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmac_4x8_8x8_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmac_4x8_8x8_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmac_4x8_8x8_conf | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmac_4x8_8x8_conf | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmac_4x8_8x8T | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmac_4x8_8x8T | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmac_4x8_8x8T | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmac_4x8_8x8T | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmac_4x8_8x8T | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmac_4x8_8x8T | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmac_4x8_8x8T | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmac_4x8_8x8T | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmac_4x8_8x8T_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmac_4x8_8x8T_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmac_4x8_8x8T_conf | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmac_4x8_8x8T_conf | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmac_4x8_8x8T_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmac_4x8_8x8T_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmac_4x8_8x8T_conf | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmac_4x8_8x8T_conf | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_8x16_16x8 | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_8x16_16x8 | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_8x16_16x8 | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_8x16_16x8 | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_8x16_16x8 | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_8x16_16x8 | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_8x16_16x8 | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_8x16_16x8 | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_8x16_16x8_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_8x16_16x8_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_8x16_16x8_conf | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_8x16_16x8_conf | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_8x16_16x8_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_8x16_16x8_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_8x16_16x8_conf | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_8x16_16x8_conf | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_8x16_16x8T | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_8x16_16x8T | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_8x16_16x8T | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_8x16_16x8T | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_8x16_16x8T | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_8x16_16x8T | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_8x16_16x8T | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_8x16_16x8T | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmac_8x16_16x8T_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_8x16_16x8T_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_8x16_16x8T_conf | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_8x16_16x8T_conf | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_8x16_16x8T_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_8x16_16x8T_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_8x16_16x8T_conf | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmac_8x16_16x8T_conf | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_4x16_16x16 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_4x16_16x16 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_4x16_16x16 | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_4x16_16x16 | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_4x16_16x16 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_4x16_16x16 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_4x16_16x16 | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_4x16_16x16 | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_4x16_16x16_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_4x16_16x16_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_4x16_16x16_conf | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_4x16_16x16_conf | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_4x16_16x16_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_4x16_16x16_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_4x16_16x16_conf | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_4x16_16x16_conf | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64accfloat addmsc_4x16_16x16T | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2 ) |
| v64accfloat addmsc_4x16_16x16T | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2 ) |
| v64accfloat addmsc_4x16_16x16T | ( | v64bfloat8 | a, |
| v256bfloat8_sparse | b, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2 ) |
| v64accfloat addmsc_4x16_16x16T | ( | v64bfloat8 | a, |
| v256float8_sparse | b, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2 ) |
| v64accfloat addmsc_4x16_16x16T | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2 ) |
| v64accfloat addmsc_4x16_16x16T | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2 ) |
| v64accfloat addmsc_4x16_16x16T | ( | v64float8 | a, |
| v256bfloat8_sparse | b, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2 ) |
| v64accfloat addmsc_4x16_16x16T | ( | v64float8 | a, |
| v256float8_sparse | b, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2 ) |
| v64acc32 addmsc_4x16_16x16T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_4x16_16x16T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_4x16_16x16T | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_4x16_16x16T | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_4x16_16x16T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_4x16_16x16T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_4x16_16x16T | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_4x16_16x16T | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64accfloat addmsc_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64accfloat addmsc_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64accfloat addmsc_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| v256bfloat8_sparse | b, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64accfloat addmsc_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| v256float8_sparse | b, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64accfloat addmsc_4x16_16x16T_conf | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64accfloat addmsc_4x16_16x16T_conf | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64accfloat addmsc_4x16_16x16T_conf | ( | v64float8 | a, |
| v256bfloat8_sparse | b, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64accfloat addmsc_4x16_16x16T_conf | ( | v64float8 | a, |
| v256float8_sparse | b, | ||
| v64accfloat | acc1, | ||
| v64accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_4x16_16x16T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_4x16_16x16T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_4x16_16x16T_conf | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_4x16_16x16T_conf | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_4x16_16x16T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_4x16_16x16T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_4x16_16x16T_conf | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_4x16_16x16T_conf | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32accfloat addmsc_4x16_16x8T | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2 ) |
| v32accfloat addmsc_4x16_16x8T | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2 ) |
| v32accfloat addmsc_4x16_16x8T | ( | v64bfloat16 | a, |
| v128bfloat16_sparse | b, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2 ) |
| v32accfloat addmsc_4x16_16x8T | ( | v64bfloat16 | a, |
| v128float16_sparse | b, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2 ) |
| v32accfloat addmsc_4x16_16x8T | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2 ) |
| v32accfloat addmsc_4x16_16x8T | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2 ) |
| v32accfloat addmsc_4x16_16x8T | ( | v64float16 | a, |
| v128bfloat16_sparse | b, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2 ) |
| v32accfloat addmsc_4x16_16x8T | ( | v64float16 | a, |
| v128float16_sparse | b, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2 ) |
| v32acc32 addmsc_4x16_16x8T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 ) |
| v32acc32 addmsc_4x16_16x8T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 ) |
| v32acc32 addmsc_4x16_16x8T | ( | v64int8 | a, |
| v128int8_sparse | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 ) |
| v32acc32 addmsc_4x16_16x8T | ( | v64int8 | a, |
| v128uint8_sparse | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 ) |
| v32acc32 addmsc_4x16_16x8T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 ) |
| v32acc32 addmsc_4x16_16x8T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 ) |
| v32acc32 addmsc_4x16_16x8T | ( | v64uint8 | a, |
| v128int8_sparse | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 ) |
| v32acc32 addmsc_4x16_16x8T | ( | v64uint8 | a, |
| v128uint8_sparse | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2 ) |
| v32accfloat addmsc_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32accfloat addmsc_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32accfloat addmsc_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| v128bfloat16_sparse | b, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32accfloat addmsc_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| v128float16_sparse | b, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32accfloat addmsc_4x16_16x8T_conf | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32accfloat addmsc_4x16_16x8T_conf | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32accfloat addmsc_4x16_16x8T_conf | ( | v64float16 | a, |
| v128bfloat16_sparse | b, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32accfloat addmsc_4x16_16x8T_conf | ( | v64float16 | a, |
| v128float16_sparse | b, | ||
| v32accfloat | acc1, | ||
| v32accfloat | acc2, | ||
| int | zero_acc1, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc32 addmsc_4x16_16x8T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc32 addmsc_4x16_16x8T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc32 addmsc_4x16_16x8T_conf | ( | v64int8 | a, |
| v128int8_sparse | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc32 addmsc_4x16_16x8T_conf | ( | v64int8 | a, |
| v128uint8_sparse | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc32 addmsc_4x16_16x8T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc32 addmsc_4x16_16x8T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc32 addmsc_4x16_16x8T_conf | ( | v64uint8 | a, |
| v128int8_sparse | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc32 addmsc_4x16_16x8T_conf | ( | v64uint8 | a, |
| v128uint8_sparse | b, | ||
| v32acc32 | acc1, | ||
| v32acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmsc_4x8_8x8 | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmsc_4x8_8x8 | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmsc_4x8_8x8 | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmsc_4x8_8x8 | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmsc_4x8_8x8 | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmsc_4x8_8x8 | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmsc_4x8_8x8 | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmsc_4x8_8x8 | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmsc_4x8_8x8_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmsc_4x8_8x8_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmsc_4x8_8x8_conf | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmsc_4x8_8x8_conf | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmsc_4x8_8x8_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmsc_4x8_8x8_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmsc_4x8_8x8_conf | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmsc_4x8_8x8_conf | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmsc_4x8_8x8T | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmsc_4x8_8x8T | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmsc_4x8_8x8T | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmsc_4x8_8x8T | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmsc_4x8_8x8T | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmsc_4x8_8x8T | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmsc_4x8_8x8T | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmsc_4x8_8x8T | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2 ) |
| v32acc64 addmsc_4x8_8x8T_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmsc_4x8_8x8T_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmsc_4x8_8x8T_conf | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmsc_4x8_8x8T_conf | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmsc_4x8_8x8T_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmsc_4x8_8x8T_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmsc_4x8_8x8T_conf | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v32acc64 addmsc_4x8_8x8T_conf | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc1, | ||
| v32acc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_8x16_16x8 | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_8x16_16x8 | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_8x16_16x8 | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_8x16_16x8 | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_8x16_16x8 | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_8x16_16x8 | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_8x16_16x8 | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_8x16_16x8 | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_8x16_16x8_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_8x16_16x8_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_8x16_16x8_conf | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_8x16_16x8_conf | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_8x16_16x8_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_8x16_16x8_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_8x16_16x8_conf | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_8x16_16x8_conf | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_8x16_16x8T | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_8x16_16x8T | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_8x16_16x8T | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_8x16_16x8T | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_8x16_16x8T | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_8x16_16x8T | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_8x16_16x8T | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_8x16_16x8T | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2 ) |
| v64acc32 addmsc_8x16_16x8T_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_8x16_16x8T_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_8x16_16x8T_conf | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_8x16_16x8T_conf | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_8x16_16x8T_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_8x16_16x8T_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_8x16_16x8T_conf | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 addmsc_8x16_16x8T_conf | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc1, | ||
| v64acc32 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v64acc32 mac_4x16_16x16 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 mac_4x16_16x16 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 mac_4x16_16x16 | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 mac_4x16_16x16 | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 mac_4x16_16x16 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 mac_4x16_16x16 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 mac_4x16_16x16 | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 mac_4x16_16x16 | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 mac_4x16_16x16_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_4x16_16x16_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_4x16_16x16_conf | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_4x16_16x16_conf | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_4x16_16x16_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_4x16_16x16_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_4x16_16x16_conf | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_4x16_16x16_conf | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64accfloat mac_4x16_16x16T | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc ) |
| v64accfloat mac_4x16_16x16T | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc ) |
| v64accfloat mac_4x16_16x16T | ( | v64bfloat8 | a, |
| v256bfloat8_sparse | b, | ||
| v64accfloat | acc ) |
| v64accfloat mac_4x16_16x16T | ( | v64bfloat8 | a, |
| v256float8_sparse | b, | ||
| v64accfloat | acc ) |
| v64accfloat mac_4x16_16x16T | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc ) |
| v64accfloat mac_4x16_16x16T | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc ) |
| v64accfloat mac_4x16_16x16T | ( | v64float8 | a, |
| v256bfloat8_sparse | b, | ||
| v64accfloat | acc ) |
| v64accfloat mac_4x16_16x16T | ( | v64float8 | a, |
| v256float8_sparse | b, | ||
| v64accfloat | acc ) |
| v64acc32 mac_4x16_16x16T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 mac_4x16_16x16T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 mac_4x16_16x16T | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 mac_4x16_16x16T | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 mac_4x16_16x16T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 mac_4x16_16x16T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 mac_4x16_16x16T | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 mac_4x16_16x16T | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc ) |
| v64accfloat mac_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64accfloat mac_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64accfloat mac_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| v256bfloat8_sparse | b, | ||
| v64accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64accfloat mac_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| v256float8_sparse | b, | ||
| v64accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64accfloat mac_4x16_16x16T_conf | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64accfloat mac_4x16_16x16T_conf | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64accfloat mac_4x16_16x16T_conf | ( | v64float8 | a, |
| v256bfloat8_sparse | b, | ||
| v64accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64accfloat mac_4x16_16x16T_conf | ( | v64float8 | a, |
| v256float8_sparse | b, | ||
| v64accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_4x16_16x16T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_4x16_16x16T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_4x16_16x16T_conf | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_4x16_16x16T_conf | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_4x16_16x16T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_4x16_16x16T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_4x16_16x16T_conf | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_4x16_16x16T_conf | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32accfloat mac_4x16_16x8T | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc ) |
| v32accfloat mac_4x16_16x8T | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc ) |
| v32accfloat mac_4x16_16x8T | ( | v64bfloat16 | a, |
| v128bfloat16_sparse | b, | ||
| v32accfloat | acc ) |
| v32accfloat mac_4x16_16x8T | ( | v64bfloat16 | a, |
| v128float16_sparse | b, | ||
| v32accfloat | acc ) |
| v32accfloat mac_4x16_16x8T | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc ) |
| v32accfloat mac_4x16_16x8T | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc ) |
| v32accfloat mac_4x16_16x8T | ( | v64float16 | a, |
| v128bfloat16_sparse | b, | ||
| v32accfloat | acc ) |
| v32accfloat mac_4x16_16x8T | ( | v64float16 | a, |
| v128float16_sparse | b, | ||
| v32accfloat | acc ) |
| v32acc32 mac_4x16_16x8T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc ) |
| v32acc32 mac_4x16_16x8T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc ) |
| v32acc32 mac_4x16_16x8T | ( | v64int8 | a, |
| v128int8_sparse | b, | ||
| v32acc32 | acc ) |
| v32acc32 mac_4x16_16x8T | ( | v64int8 | a, |
| v128uint8_sparse | b, | ||
| v32acc32 | acc ) |
| v32acc32 mac_4x16_16x8T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc ) |
| v32acc32 mac_4x16_16x8T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc ) |
| v32acc32 mac_4x16_16x8T | ( | v64uint8 | a, |
| v128int8_sparse | b, | ||
| v32acc32 | acc ) |
| v32acc32 mac_4x16_16x8T | ( | v64uint8 | a, |
| v128uint8_sparse | b, | ||
| v32acc32 | acc ) |
| v32accfloat mac_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32accfloat mac_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32accfloat mac_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| v128bfloat16_sparse | b, | ||
| v32accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32accfloat mac_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| v128float16_sparse | b, | ||
| v32accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32accfloat mac_4x16_16x8T_conf | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32accfloat mac_4x16_16x8T_conf | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32accfloat mac_4x16_16x8T_conf | ( | v64float16 | a, |
| v128bfloat16_sparse | b, | ||
| v32accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32accfloat mac_4x16_16x8T_conf | ( | v64float16 | a, |
| v128float16_sparse | b, | ||
| v32accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc32 mac_4x16_16x8T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc32 mac_4x16_16x8T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc32 mac_4x16_16x8T_conf | ( | v64int8 | a, |
| v128int8_sparse | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc32 mac_4x16_16x8T_conf | ( | v64int8 | a, |
| v128uint8_sparse | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc32 mac_4x16_16x8T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc32 mac_4x16_16x8T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc32 mac_4x16_16x8T_conf | ( | v64uint8 | a, |
| v128int8_sparse | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc32 mac_4x16_16x8T_conf | ( | v64uint8 | a, |
| v128uint8_sparse | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 mac_4x8_8x8 | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc ) |
| v32acc64 mac_4x8_8x8 | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc ) |
| v32acc64 mac_4x8_8x8 | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc ) |
| v32acc64 mac_4x8_8x8 | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc ) |
| v32acc64 mac_4x8_8x8 | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc ) |
| v32acc64 mac_4x8_8x8 | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc ) |
| v32acc64 mac_4x8_8x8 | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc ) |
| v32acc64 mac_4x8_8x8 | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc ) |
| v32acc64 mac_4x8_8x8_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 mac_4x8_8x8_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 mac_4x8_8x8_conf | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 mac_4x8_8x8_conf | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 mac_4x8_8x8_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 mac_4x8_8x8_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 mac_4x8_8x8_conf | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 mac_4x8_8x8_conf | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 mac_4x8_8x8T | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc ) |
| v32acc64 mac_4x8_8x8T | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc ) |
| v32acc64 mac_4x8_8x8T | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc ) |
| v32acc64 mac_4x8_8x8T | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc ) |
| v32acc64 mac_4x8_8x8T | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc ) |
| v32acc64 mac_4x8_8x8T | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc ) |
| v32acc64 mac_4x8_8x8T | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc ) |
| v32acc64 mac_4x8_8x8T | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc ) |
| v32acc64 mac_4x8_8x8T_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 mac_4x8_8x8T_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 mac_4x8_8x8T_conf | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 mac_4x8_8x8T_conf | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 mac_4x8_8x8T_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 mac_4x8_8x8T_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 mac_4x8_8x8T_conf | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 mac_4x8_8x8T_conf | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_8x16_16x8 | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 mac_8x16_16x8 | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 mac_8x16_16x8 | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 mac_8x16_16x8 | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 mac_8x16_16x8 | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 mac_8x16_16x8 | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 mac_8x16_16x8 | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 mac_8x16_16x8 | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 mac_8x16_16x8_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_8x16_16x8_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_8x16_16x8_conf | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_8x16_16x8_conf | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_8x16_16x8_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_8x16_16x8_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_8x16_16x8_conf | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_8x16_16x8_conf | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_8x16_16x8T | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 mac_8x16_16x8T | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 mac_8x16_16x8T | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 mac_8x16_16x8T | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 mac_8x16_16x8T | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 mac_8x16_16x8T | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 mac_8x16_16x8T | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 mac_8x16_16x8T | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 mac_8x16_16x8T_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_8x16_16x8T_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_8x16_16x8T_conf | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_8x16_16x8T_conf | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_8x16_16x8T_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_8x16_16x8T_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_8x16_16x8T_conf | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mac_8x16_16x8T_conf | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_4x16_16x16 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 msc_4x16_16x16 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 msc_4x16_16x16 | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 msc_4x16_16x16 | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 msc_4x16_16x16 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 msc_4x16_16x16 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 msc_4x16_16x16 | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 msc_4x16_16x16 | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 msc_4x16_16x16_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_4x16_16x16_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_4x16_16x16_conf | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_4x16_16x16_conf | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_4x16_16x16_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_4x16_16x16_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_4x16_16x16_conf | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_4x16_16x16_conf | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64accfloat msc_4x16_16x16T | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc ) |
| v64accfloat msc_4x16_16x16T | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc ) |
| v64accfloat msc_4x16_16x16T | ( | v64bfloat8 | a, |
| v256bfloat8_sparse | b, | ||
| v64accfloat | acc ) |
| v64accfloat msc_4x16_16x16T | ( | v64bfloat8 | a, |
| v256float8_sparse | b, | ||
| v64accfloat | acc ) |
| v64accfloat msc_4x16_16x16T | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc ) |
| v64accfloat msc_4x16_16x16T | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc ) |
| v64accfloat msc_4x16_16x16T | ( | v64float8 | a, |
| v256bfloat8_sparse | b, | ||
| v64accfloat | acc ) |
| v64accfloat msc_4x16_16x16T | ( | v64float8 | a, |
| v256float8_sparse | b, | ||
| v64accfloat | acc ) |
| v64acc32 msc_4x16_16x16T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 msc_4x16_16x16T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 msc_4x16_16x16T | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 msc_4x16_16x16T | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 msc_4x16_16x16T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 msc_4x16_16x16T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 msc_4x16_16x16T | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 msc_4x16_16x16T | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc ) |
| v64accfloat msc_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64accfloat msc_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64accfloat msc_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| v256bfloat8_sparse | b, | ||
| v64accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64accfloat msc_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| v256float8_sparse | b, | ||
| v64accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64accfloat msc_4x16_16x16T_conf | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64accfloat msc_4x16_16x16T_conf | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| v64accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64accfloat msc_4x16_16x16T_conf | ( | v64float8 | a, |
| v256bfloat8_sparse | b, | ||
| v64accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64accfloat msc_4x16_16x16T_conf | ( | v64float8 | a, |
| v256float8_sparse | b, | ||
| v64accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_4x16_16x16T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_4x16_16x16T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_4x16_16x16T_conf | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_4x16_16x16T_conf | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_4x16_16x16T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_4x16_16x16T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_4x16_16x16T_conf | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_4x16_16x16T_conf | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32accfloat msc_4x16_16x8T | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc ) |
| v32accfloat msc_4x16_16x8T | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc ) |
| v32accfloat msc_4x16_16x8T | ( | v64bfloat16 | a, |
| v128bfloat16_sparse | b, | ||
| v32accfloat | acc ) |
| v32accfloat msc_4x16_16x8T | ( | v64bfloat16 | a, |
| v128float16_sparse | b, | ||
| v32accfloat | acc ) |
| v32accfloat msc_4x16_16x8T | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc ) |
| v32accfloat msc_4x16_16x8T | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc ) |
| v32accfloat msc_4x16_16x8T | ( | v64float16 | a, |
| v128bfloat16_sparse | b, | ||
| v32accfloat | acc ) |
| v32accfloat msc_4x16_16x8T | ( | v64float16 | a, |
| v128float16_sparse | b, | ||
| v32accfloat | acc ) |
| v32acc32 msc_4x16_16x8T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc ) |
| v32acc32 msc_4x16_16x8T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc ) |
| v32acc32 msc_4x16_16x8T | ( | v64int8 | a, |
| v128int8_sparse | b, | ||
| v32acc32 | acc ) |
| v32acc32 msc_4x16_16x8T | ( | v64int8 | a, |
| v128uint8_sparse | b, | ||
| v32acc32 | acc ) |
| v32acc32 msc_4x16_16x8T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc ) |
| v32acc32 msc_4x16_16x8T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc ) |
| v32acc32 msc_4x16_16x8T | ( | v64uint8 | a, |
| v128int8_sparse | b, | ||
| v32acc32 | acc ) |
| v32acc32 msc_4x16_16x8T | ( | v64uint8 | a, |
| v128uint8_sparse | b, | ||
| v32acc32 | acc ) |
| v32accfloat msc_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32accfloat msc_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32accfloat msc_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| v128bfloat16_sparse | b, | ||
| v32accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32accfloat msc_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| v128float16_sparse | b, | ||
| v32accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32accfloat msc_4x16_16x8T_conf | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32accfloat msc_4x16_16x8T_conf | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| v32accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32accfloat msc_4x16_16x8T_conf | ( | v64float16 | a, |
| v128bfloat16_sparse | b, | ||
| v32accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32accfloat msc_4x16_16x8T_conf | ( | v64float16 | a, |
| v128float16_sparse | b, | ||
| v32accfloat | acc, | ||
| int | zero_acc, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc32 msc_4x16_16x8T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc32 msc_4x16_16x8T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc32 msc_4x16_16x8T_conf | ( | v64int8 | a, |
| v128int8_sparse | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc32 msc_4x16_16x8T_conf | ( | v64int8 | a, |
| v128uint8_sparse | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc32 msc_4x16_16x8T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc32 msc_4x16_16x8T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc32 msc_4x16_16x8T_conf | ( | v64uint8 | a, |
| v128int8_sparse | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc32 msc_4x16_16x8T_conf | ( | v64uint8 | a, |
| v128uint8_sparse | b, | ||
| v32acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 msc_4x8_8x8 | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc ) |
| v32acc64 msc_4x8_8x8 | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc ) |
| v32acc64 msc_4x8_8x8 | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc ) |
| v32acc64 msc_4x8_8x8 | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc ) |
| v32acc64 msc_4x8_8x8 | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc ) |
| v32acc64 msc_4x8_8x8 | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc ) |
| v32acc64 msc_4x8_8x8 | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc ) |
| v32acc64 msc_4x8_8x8 | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc ) |
| v32acc64 msc_4x8_8x8_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 msc_4x8_8x8_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 msc_4x8_8x8_conf | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 msc_4x8_8x8_conf | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 msc_4x8_8x8_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 msc_4x8_8x8_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 msc_4x8_8x8_conf | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 msc_4x8_8x8_conf | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 msc_4x8_8x8T | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc ) |
| v32acc64 msc_4x8_8x8T | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc ) |
| v32acc64 msc_4x8_8x8T | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc ) |
| v32acc64 msc_4x8_8x8T | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc ) |
| v32acc64 msc_4x8_8x8T | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc ) |
| v32acc64 msc_4x8_8x8T | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc ) |
| v32acc64 msc_4x8_8x8T | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc ) |
| v32acc64 msc_4x8_8x8T | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc ) |
| v32acc64 msc_4x8_8x8T_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 msc_4x8_8x8T_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 msc_4x8_8x8T_conf | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 msc_4x8_8x8T_conf | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 msc_4x8_8x8T_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 msc_4x8_8x8T_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 msc_4x8_8x8T_conf | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v32acc64 msc_4x8_8x8T_conf | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| v32acc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_8x16_16x8 | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 msc_8x16_16x8 | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 msc_8x16_16x8 | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 msc_8x16_16x8 | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 msc_8x16_16x8 | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 msc_8x16_16x8 | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 msc_8x16_16x8 | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 msc_8x16_16x8 | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 msc_8x16_16x8_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_8x16_16x8_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_8x16_16x8_conf | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_8x16_16x8_conf | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_8x16_16x8_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_8x16_16x8_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_8x16_16x8_conf | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_8x16_16x8_conf | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_8x16_16x8T | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 msc_8x16_16x8T | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 msc_8x16_16x8T | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 msc_8x16_16x8T | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 msc_8x16_16x8T | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 msc_8x16_16x8T | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc ) |
| v64acc32 msc_8x16_16x8T | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 msc_8x16_16x8T | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc ) |
| v64acc32 msc_8x16_16x8T_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_8x16_16x8T_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_8x16_16x8T_conf | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_8x16_16x8T_conf | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_8x16_16x8T_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_8x16_16x8T_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_8x16_16x8T_conf | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 msc_8x16_16x8T_conf | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| v64acc32 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v64acc32 mul_4x16_16x16 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 mul_4x16_16x16 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 mul_4x16_16x16 | ( | v64int8 | a, |
| v256int8_sparse | b ) |
| v64acc32 mul_4x16_16x16 | ( | v64int8 | a, |
| v256uint8_sparse | b ) |
| v64acc32 mul_4x16_16x16 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 mul_4x16_16x16 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 mul_4x16_16x16 | ( | v64uint8 | a, |
| v256int8_sparse | b ) |
| v64acc32 mul_4x16_16x16 | ( | v64uint8 | a, |
| v256uint8_sparse | b ) |
| v64acc32 mul_4x16_16x16_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 mul_4x16_16x16_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 mul_4x16_16x16_conf | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 mul_4x16_16x16_conf | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 mul_4x16_16x16_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 mul_4x16_16x16_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 mul_4x16_16x16_conf | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 mul_4x16_16x16_conf | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| int | sub_mul ) |
| v64accfloat mul_4x16_16x16T | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y ) |
| v64accfloat mul_4x16_16x16T | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y ) |
| v64accfloat mul_4x16_16x16T | ( | v64bfloat8 | a, |
| v256bfloat8_sparse | b ) |
| v64accfloat mul_4x16_16x16T | ( | v64bfloat8 | a, |
| v256float8_sparse | b ) |
| v64accfloat mul_4x16_16x16T | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y ) |
| v64accfloat mul_4x16_16x16T | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y ) |
| v64accfloat mul_4x16_16x16T | ( | v64float8 | a, |
| v256bfloat8_sparse | b ) |
| v64accfloat mul_4x16_16x16T | ( | v64float8 | a, |
| v256float8_sparse | b ) |
| v64acc32 mul_4x16_16x16T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 mul_4x16_16x16T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 mul_4x16_16x16T | ( | v64int8 | a, |
| v256int8_sparse | b ) |
| v64acc32 mul_4x16_16x16T | ( | v64int8 | a, |
| v256uint8_sparse | b ) |
| v64acc32 mul_4x16_16x16T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 mul_4x16_16x16T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 mul_4x16_16x16T | ( | v64uint8 | a, |
| v256int8_sparse | b ) |
| v64acc32 mul_4x16_16x16T | ( | v64uint8 | a, |
| v256uint8_sparse | b ) |
| v64accfloat mul_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64accfloat mul_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64accfloat mul_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| v256bfloat8_sparse | b, | ||
| int | sub_mul ) |
| v64accfloat mul_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| v256float8_sparse | b, | ||
| int | sub_mul ) |
| v64accfloat mul_4x16_16x16T_conf | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64accfloat mul_4x16_16x16T_conf | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64accfloat mul_4x16_16x16T_conf | ( | v64float8 | a, |
| v256bfloat8_sparse | b, | ||
| int | sub_mul ) |
| v64accfloat mul_4x16_16x16T_conf | ( | v64float8 | a, |
| v256float8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 mul_4x16_16x16T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 mul_4x16_16x16T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 mul_4x16_16x16T_conf | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 mul_4x16_16x16T_conf | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 mul_4x16_16x16T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 mul_4x16_16x16T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 mul_4x16_16x16T_conf | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 mul_4x16_16x16T_conf | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| int | sub_mul ) |
| v32accfloat mul_4x16_16x8T | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y ) |
| v32accfloat mul_4x16_16x8T | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y ) |
| v32accfloat mul_4x16_16x8T | ( | v64bfloat16 | a, |
| v128bfloat16_sparse | b ) |
| v32accfloat mul_4x16_16x8T | ( | v64bfloat16 | a, |
| v128float16_sparse | b ) |
| v32accfloat mul_4x16_16x8T | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y ) |
| v32accfloat mul_4x16_16x8T | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y ) |
| v32accfloat mul_4x16_16x8T | ( | v64float16 | a, |
| v128bfloat16_sparse | b ) |
| v32accfloat mul_4x16_16x8T | ( | v64float16 | a, |
| v128float16_sparse | b ) |
| v32acc32 mul_4x16_16x8T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y ) |
| v32acc32 mul_4x16_16x8T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y ) |
| v32acc32 mul_4x16_16x8T | ( | v64int8 | a, |
| v128int8_sparse | b ) |
| v32acc32 mul_4x16_16x8T | ( | v64int8 | a, |
| v128uint8_sparse | b ) |
| v32acc32 mul_4x16_16x8T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y ) |
| v32acc32 mul_4x16_16x8T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y ) |
| v32acc32 mul_4x16_16x8T | ( | v64uint8 | a, |
| v128int8_sparse | b ) |
| v32acc32 mul_4x16_16x8T | ( | v64uint8 | a, |
| v128uint8_sparse | b ) |
| v32accfloat mul_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32accfloat mul_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32accfloat mul_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| v128bfloat16_sparse | b, | ||
| int | sub_mul ) |
| v32accfloat mul_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| v128float16_sparse | b, | ||
| int | sub_mul ) |
| v32accfloat mul_4x16_16x8T_conf | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32accfloat mul_4x16_16x8T_conf | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32accfloat mul_4x16_16x8T_conf | ( | v64float16 | a, |
| v128bfloat16_sparse | b, | ||
| int | sub_mul ) |
| v32accfloat mul_4x16_16x8T_conf | ( | v64float16 | a, |
| v128float16_sparse | b, | ||
| int | sub_mul ) |
| v32acc32 mul_4x16_16x8T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc32 mul_4x16_16x8T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc32 mul_4x16_16x8T_conf | ( | v64int8 | a, |
| v128int8_sparse | b, | ||
| int | sub_mul ) |
| v32acc32 mul_4x16_16x8T_conf | ( | v64int8 | a, |
| v128uint8_sparse | b, | ||
| int | sub_mul ) |
| v32acc32 mul_4x16_16x8T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc32 mul_4x16_16x8T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc32 mul_4x16_16x8T_conf | ( | v64uint8 | a, |
| v128int8_sparse | b, | ||
| int | sub_mul ) |
| v32acc32 mul_4x16_16x8T_conf | ( | v64uint8 | a, |
| v128uint8_sparse | b, | ||
| int | sub_mul ) |
| v32acc64 mul_4x8_8x8 | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y ) |
| v32acc64 mul_4x8_8x8 | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y ) |
| v32acc64 mul_4x8_8x8 | ( | v32int16 | a, |
| v64int16_sparse | b ) |
| v32acc64 mul_4x8_8x8 | ( | v32int16 | a, |
| v64uint16_sparse | b ) |
| v32acc64 mul_4x8_8x8 | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y ) |
| v32acc64 mul_4x8_8x8 | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y ) |
| v32acc64 mul_4x8_8x8 | ( | v32uint16 | a, |
| v64int16_sparse | b ) |
| v32acc64 mul_4x8_8x8 | ( | v32uint16 | a, |
| v64uint16_sparse | b ) |
| v32acc64 mul_4x8_8x8_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc64 mul_4x8_8x8_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc64 mul_4x8_8x8_conf | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| int | sub_mul ) |
| v32acc64 mul_4x8_8x8_conf | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| int | sub_mul ) |
| v32acc64 mul_4x8_8x8_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc64 mul_4x8_8x8_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc64 mul_4x8_8x8_conf | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| int | sub_mul ) |
| v32acc64 mul_4x8_8x8_conf | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| int | sub_mul ) |
| v32acc64 mul_4x8_8x8T | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y ) |
| v32acc64 mul_4x8_8x8T | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y ) |
| v32acc64 mul_4x8_8x8T | ( | v32int16 | a, |
| v64int16_sparse | b ) |
| v32acc64 mul_4x8_8x8T | ( | v32int16 | a, |
| v64uint16_sparse | b ) |
| v32acc64 mul_4x8_8x8T | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y ) |
| v32acc64 mul_4x8_8x8T | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y ) |
| v32acc64 mul_4x8_8x8T | ( | v32uint16 | a, |
| v64int16_sparse | b ) |
| v32acc64 mul_4x8_8x8T | ( | v32uint16 | a, |
| v64uint16_sparse | b ) |
| v32acc64 mul_4x8_8x8T_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc64 mul_4x8_8x8T_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc64 mul_4x8_8x8T_conf | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| int | sub_mul ) |
| v32acc64 mul_4x8_8x8T_conf | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| int | sub_mul ) |
| v32acc64 mul_4x8_8x8T_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc64 mul_4x8_8x8T_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc64 mul_4x8_8x8T_conf | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| int | sub_mul ) |
| v32acc64 mul_4x8_8x8T_conf | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 mul_8x16_16x8 | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 mul_8x16_16x8 | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 mul_8x16_16x8 | ( | v128int8 | a, |
| v128int8_sparse | b ) |
| v64acc32 mul_8x16_16x8 | ( | v128int8 | a, |
| v128uint8_sparse | b ) |
| v64acc32 mul_8x16_16x8 | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 mul_8x16_16x8 | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 mul_8x16_16x8 | ( | v128uint8 | a, |
| v128int8_sparse | b ) |
| v64acc32 mul_8x16_16x8 | ( | v128uint8 | a, |
| v128uint8_sparse | b ) |
| v64acc32 mul_8x16_16x8_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 mul_8x16_16x8_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 mul_8x16_16x8_conf | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 mul_8x16_16x8_conf | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 mul_8x16_16x8_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 mul_8x16_16x8_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 mul_8x16_16x8_conf | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 mul_8x16_16x8_conf | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 mul_8x16_16x8T | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 mul_8x16_16x8T | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 mul_8x16_16x8T | ( | v128int8 | a, |
| v128int8_sparse | b ) |
| v64acc32 mul_8x16_16x8T | ( | v128int8 | a, |
| v128uint8_sparse | b ) |
| v64acc32 mul_8x16_16x8T | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 mul_8x16_16x8T | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 mul_8x16_16x8T | ( | v128uint8 | a, |
| v128int8_sparse | b ) |
| v64acc32 mul_8x16_16x8T | ( | v128uint8 | a, |
| v128uint8_sparse | b ) |
| v64acc32 mul_8x16_16x8T_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 mul_8x16_16x8T_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 mul_8x16_16x8T_conf | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 mul_8x16_16x8T_conf | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 mul_8x16_16x8T_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 mul_8x16_16x8T_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 mul_8x16_16x8T_conf | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 mul_8x16_16x8T_conf | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 negmul_4x16_16x16 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 negmul_4x16_16x16 | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 negmul_4x16_16x16 | ( | v64int8 | a, |
| v256int8_sparse | b ) |
| v64acc32 negmul_4x16_16x16 | ( | v64int8 | a, |
| v256uint8_sparse | b ) |
| v64acc32 negmul_4x16_16x16 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 negmul_4x16_16x16 | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 negmul_4x16_16x16 | ( | v64uint8 | a, |
| v256int8_sparse | b ) |
| v64acc32 negmul_4x16_16x16 | ( | v64uint8 | a, |
| v256uint8_sparse | b ) |
| v64acc32 negmul_4x16_16x16_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 negmul_4x16_16x16_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 negmul_4x16_16x16_conf | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 negmul_4x16_16x16_conf | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 negmul_4x16_16x16_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 negmul_4x16_16x16_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 negmul_4x16_16x16_conf | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 negmul_4x16_16x16_conf | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| int | sub_mul ) |
| v64accfloat negmul_4x16_16x16T | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y ) |
| v64accfloat negmul_4x16_16x16T | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y ) |
| v64accfloat negmul_4x16_16x16T | ( | v64bfloat8 | a, |
| v256bfloat8_sparse | b ) |
| v64accfloat negmul_4x16_16x16T | ( | v64bfloat8 | a, |
| v256float8_sparse | b ) |
| v64accfloat negmul_4x16_16x16T | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y ) |
| v64accfloat negmul_4x16_16x16T | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y ) |
| v64accfloat negmul_4x16_16x16T | ( | v64float8 | a, |
| v256bfloat8_sparse | b ) |
| v64accfloat negmul_4x16_16x16T | ( | v64float8 | a, |
| v256float8_sparse | b ) |
| v64acc32 negmul_4x16_16x16T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 negmul_4x16_16x16T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 negmul_4x16_16x16T | ( | v64int8 | a, |
| v256int8_sparse | b ) |
| v64acc32 negmul_4x16_16x16T | ( | v64int8 | a, |
| v256uint8_sparse | b ) |
| v64acc32 negmul_4x16_16x16T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 negmul_4x16_16x16T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 negmul_4x16_16x16T | ( | v64uint8 | a, |
| v256int8_sparse | b ) |
| v64acc32 negmul_4x16_16x16T | ( | v64uint8 | a, |
| v256uint8_sparse | b ) |
| v64accfloat negmul_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64accfloat negmul_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64accfloat negmul_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| v256bfloat8_sparse | b, | ||
| int | sub_mul ) |
| v64accfloat negmul_4x16_16x16T_conf | ( | v64bfloat8 | a, |
| v256float8_sparse | b, | ||
| int | sub_mul ) |
| v64accfloat negmul_4x16_16x16T_conf | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256bfloat8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64accfloat negmul_4x16_16x16T_conf | ( | v64float8 | a, |
| int | sgn_x, | ||
| v256float8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64accfloat negmul_4x16_16x16T_conf | ( | v64float8 | a, |
| v256bfloat8_sparse | b, | ||
| int | sub_mul ) |
| v64accfloat negmul_4x16_16x16T_conf | ( | v64float8 | a, |
| v256float8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 negmul_4x16_16x16T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 negmul_4x16_16x16T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 negmul_4x16_16x16T_conf | ( | v64int8 | a, |
| v256int8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 negmul_4x16_16x16T_conf | ( | v64int8 | a, |
| v256uint8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 negmul_4x16_16x16T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 negmul_4x16_16x16T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v256uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 negmul_4x16_16x16T_conf | ( | v64uint8 | a, |
| v256int8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 negmul_4x16_16x16T_conf | ( | v64uint8 | a, |
| v256uint8_sparse | b, | ||
| int | sub_mul ) |
| v32accfloat negmul_4x16_16x8T | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y ) |
| v32accfloat negmul_4x16_16x8T | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y ) |
| v32accfloat negmul_4x16_16x8T | ( | v64bfloat16 | a, |
| v128bfloat16_sparse | b ) |
| v32accfloat negmul_4x16_16x8T | ( | v64bfloat16 | a, |
| v128float16_sparse | b ) |
| v32accfloat negmul_4x16_16x8T | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y ) |
| v32accfloat negmul_4x16_16x8T | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y ) |
| v32accfloat negmul_4x16_16x8T | ( | v64float16 | a, |
| v128bfloat16_sparse | b ) |
| v32accfloat negmul_4x16_16x8T | ( | v64float16 | a, |
| v128float16_sparse | b ) |
| v32acc32 negmul_4x16_16x8T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y ) |
| v32acc32 negmul_4x16_16x8T | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y ) |
| v32acc32 negmul_4x16_16x8T | ( | v64int8 | a, |
| v128int8_sparse | b ) |
| v32acc32 negmul_4x16_16x8T | ( | v64int8 | a, |
| v128uint8_sparse | b ) |
| v32acc32 negmul_4x16_16x8T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y ) |
| v32acc32 negmul_4x16_16x8T | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y ) |
| v32acc32 negmul_4x16_16x8T | ( | v64uint8 | a, |
| v128int8_sparse | b ) |
| v32acc32 negmul_4x16_16x8T | ( | v64uint8 | a, |
| v128uint8_sparse | b ) |
| v32accfloat negmul_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32accfloat negmul_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32accfloat negmul_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| v128bfloat16_sparse | b, | ||
| int | sub_mul ) |
| v32accfloat negmul_4x16_16x8T_conf | ( | v64bfloat16 | a, |
| v128float16_sparse | b, | ||
| int | sub_mul ) |
| v32accfloat negmul_4x16_16x8T_conf | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128bfloat16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32accfloat negmul_4x16_16x8T_conf | ( | v64float16 | a, |
| int | sgn_x, | ||
| v128float16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32accfloat negmul_4x16_16x8T_conf | ( | v64float16 | a, |
| v128bfloat16_sparse | b, | ||
| int | sub_mul ) |
| v32accfloat negmul_4x16_16x8T_conf | ( | v64float16 | a, |
| v128float16_sparse | b, | ||
| int | sub_mul ) |
| v32acc32 negmul_4x16_16x8T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc32 negmul_4x16_16x8T_conf | ( | v64int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc32 negmul_4x16_16x8T_conf | ( | v64int8 | a, |
| v128int8_sparse | b, | ||
| int | sub_mul ) |
| v32acc32 negmul_4x16_16x8T_conf | ( | v64int8 | a, |
| v128uint8_sparse | b, | ||
| int | sub_mul ) |
| v32acc32 negmul_4x16_16x8T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc32 negmul_4x16_16x8T_conf | ( | v64uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc32 negmul_4x16_16x8T_conf | ( | v64uint8 | a, |
| v128int8_sparse | b, | ||
| int | sub_mul ) |
| v32acc32 negmul_4x16_16x8T_conf | ( | v64uint8 | a, |
| v128uint8_sparse | b, | ||
| int | sub_mul ) |
| v32acc64 negmul_4x8_8x8 | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y ) |
| v32acc64 negmul_4x8_8x8 | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y ) |
| v32acc64 negmul_4x8_8x8 | ( | v32int16 | a, |
| v64int16_sparse | b ) |
| v32acc64 negmul_4x8_8x8 | ( | v32int16 | a, |
| v64uint16_sparse | b ) |
| v32acc64 negmul_4x8_8x8 | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y ) |
| v32acc64 negmul_4x8_8x8 | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y ) |
| v32acc64 negmul_4x8_8x8 | ( | v32uint16 | a, |
| v64int16_sparse | b ) |
| v32acc64 negmul_4x8_8x8 | ( | v32uint16 | a, |
| v64uint16_sparse | b ) |
| v32acc64 negmul_4x8_8x8_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc64 negmul_4x8_8x8_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc64 negmul_4x8_8x8_conf | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| int | sub_mul ) |
| v32acc64 negmul_4x8_8x8_conf | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| int | sub_mul ) |
| v32acc64 negmul_4x8_8x8_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc64 negmul_4x8_8x8_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc64 negmul_4x8_8x8_conf | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| int | sub_mul ) |
| v32acc64 negmul_4x8_8x8_conf | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| int | sub_mul ) |
| v32acc64 negmul_4x8_8x8T | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y ) |
| v32acc64 negmul_4x8_8x8T | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y ) |
| v32acc64 negmul_4x8_8x8T | ( | v32int16 | a, |
| v64int16_sparse | b ) |
| v32acc64 negmul_4x8_8x8T | ( | v32int16 | a, |
| v64uint16_sparse | b ) |
| v32acc64 negmul_4x8_8x8T | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y ) |
| v32acc64 negmul_4x8_8x8T | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y ) |
| v32acc64 negmul_4x8_8x8T | ( | v32uint16 | a, |
| v64int16_sparse | b ) |
| v32acc64 negmul_4x8_8x8T | ( | v32uint16 | a, |
| v64uint16_sparse | b ) |
| v32acc64 negmul_4x8_8x8T_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc64 negmul_4x8_8x8T_conf | ( | v32int16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc64 negmul_4x8_8x8T_conf | ( | v32int16 | a, |
| v64int16_sparse | b, | ||
| int | sub_mul ) |
| v32acc64 negmul_4x8_8x8T_conf | ( | v32int16 | a, |
| v64uint16_sparse | b, | ||
| int | sub_mul ) |
| v32acc64 negmul_4x8_8x8T_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64int16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc64 negmul_4x8_8x8T_conf | ( | v32uint16 | a, |
| int | sgn_x, | ||
| v64uint16_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v32acc64 negmul_4x8_8x8T_conf | ( | v32uint16 | a, |
| v64int16_sparse | b, | ||
| int | sub_mul ) |
| v32acc64 negmul_4x8_8x8T_conf | ( | v32uint16 | a, |
| v64uint16_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 negmul_8x16_16x8 | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 negmul_8x16_16x8 | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 negmul_8x16_16x8 | ( | v128int8 | a, |
| v128int8_sparse | b ) |
| v64acc32 negmul_8x16_16x8 | ( | v128int8 | a, |
| v128uint8_sparse | b ) |
| v64acc32 negmul_8x16_16x8 | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 negmul_8x16_16x8 | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 negmul_8x16_16x8 | ( | v128uint8 | a, |
| v128int8_sparse | b ) |
| v64acc32 negmul_8x16_16x8 | ( | v128uint8 | a, |
| v128uint8_sparse | b ) |
| v64acc32 negmul_8x16_16x8_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 negmul_8x16_16x8_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 negmul_8x16_16x8_conf | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 negmul_8x16_16x8_conf | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 negmul_8x16_16x8_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 negmul_8x16_16x8_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 negmul_8x16_16x8_conf | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 negmul_8x16_16x8_conf | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 negmul_8x16_16x8T | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 negmul_8x16_16x8T | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 negmul_8x16_16x8T | ( | v128int8 | a, |
| v128int8_sparse | b ) |
| v64acc32 negmul_8x16_16x8T | ( | v128int8 | a, |
| v128uint8_sparse | b ) |
| v64acc32 negmul_8x16_16x8T | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 negmul_8x16_16x8T | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y ) |
| v64acc32 negmul_8x16_16x8T | ( | v128uint8 | a, |
| v128int8_sparse | b ) |
| v64acc32 negmul_8x16_16x8T | ( | v128uint8 | a, |
| v128uint8_sparse | b ) |
| v64acc32 negmul_8x16_16x8T_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 negmul_8x16_16x8T_conf | ( | v128int8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 negmul_8x16_16x8T_conf | ( | v128int8 | a, |
| v128int8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 negmul_8x16_16x8T_conf | ( | v128int8 | a, |
| v128uint8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 negmul_8x16_16x8T_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128int8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 negmul_8x16_16x8T_conf | ( | v128uint8 | a, |
| int | sgn_x, | ||
| v128uint8_sparse | b, | ||
| int | sgn_y, | ||
| int | sub_mul ) |
| v64acc32 negmul_8x16_16x8T_conf | ( | v128uint8 | a, |
| v128int8_sparse | b, | ||
| int | sub_mul ) |
| v64acc32 negmul_8x16_16x8T_conf | ( | v128uint8 | a, |
| v128uint8_sparse | b, | ||
| int | sub_mul ) |