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AI Engine-ML v2 Intrinsics User Guide
v2025.1
|
elem_8 | |
| v8cacc64 | mul_elem_8 (v8cint32 a, v16cint16 b) |
| v8cacc64 | negmul_elem_8 (v8cint32 a, v16cint16 b) |
| v8cacc64 | mac_elem_8 (v8cint32 a, v16cint16 b, v8cacc64 acc) |
| v8cacc64 | msc_elem_8 (v8cint32 a, v16cint16 b, v8cacc64 acc) |
| v8cacc64 | addmac_elem_8 (v8cint32 a, v16cint16 b, v8cacc64 acc1, v8cacc64 acc2) |
| v8cacc64 | addmsc_elem_8 (v8cint32 a, v16cint16 b, v8cacc64 acc1, v8cacc64 acc2) |
| v8cacc64 | mul_elem_8 (v8cint32 a, cint16 b) |
| v8cacc64 | negmul_elem_8 (v8cint32 a, cint16 b) |
| v8cacc64 | mac_elem_8 (v8cint32 a, cint16 b, v8cacc64 acc) |
| v8cacc64 | msc_elem_8 (v8cint32 a, cint16 b, v8cacc64 acc) |
| v8cacc64 | addmac_elem_8 (v8cint32 a, cint16 b, v8cacc64 acc1, v8cacc64 acc2) |
| v8cacc64 | addmsc_elem_8 (v8cint32 a, cint16 b, v8cacc64 acc1, v8cacc64 acc2) |
elem_8 with dynamic negation of multiplication result | |
| v8cacc64 | mul_elem_8_conf (v8cint32 a, v16cint16 b, int sub_mask, int sub_mul) |
| v8cacc64 | negmul_elem_8_conf (v8cint32 a, v16cint16 b, int sub_mask, int sub_mul) |
| v8cacc64 | mul_elem_8_conf (v8cint32 a, cint16 b, int sub_mask, int sub_mul) |
| v8cacc64 | negmul_elem_8_conf (v8cint32 a, cint16 b, int sub_mask, int sub_mul) |
elem_8 with dynamic negation of multiplication result, zeroing of acc1, negation of acc1 | |
| v8cacc64 | mac_elem_8_conf (v8cint32 a, v16cint16 b, v8cacc64 acc, int zero_acc, int shift16, int sub_mask, int sub_mul, int sub_acc1) |
| v8cacc64 | msc_elem_8_conf (v8cint32 a, v16cint16 b, v8cacc64 acc, int zero_acc, int shift16, int sub_mask, int sub_mul, int sub_acc1) |
| v8cacc64 | addmac_elem_8_conf (v8cint32 a, v16cint16 b, v8cacc64 acc1, v8cacc64 acc2, int zero_acc1, int shift16, int sub_mask, int sub_mul, int sub_acc1, int sub_acc2) |
| v8cacc64 | addmsc_elem_8_conf (v8cint32 a, v16cint16 b, v8cacc64 acc1, v8cacc64 acc2, int zero_acc1, int shift16, int sub_mask, int sub_mul, int sub_acc1, int sub_acc2) |
| v8cacc64 | mac_elem_8_conf (v8cint32 a, cint16 b, v8cacc64 acc, int zero_acc, int shift16, int sub_mask, int sub_mul, int sub_acc1) |
| v8cacc64 | msc_elem_8_conf (v8cint32 a, cint16 b, v8cacc64 acc, int zero_acc, int shift16, int sub_mask, int sub_mul, int sub_acc1) |
| v8cacc64 | addmac_elem_8_conf (v8cint32 a, cint16 b, v8cacc64 acc1, v8cacc64 acc2, int zero_acc1, int shift16, int sub_mask, int sub_mul, int sub_acc1, int sub_acc2) |
| v8cacc64 | addmsc_elem_8_conf (v8cint32 a, cint16 b, v8cacc64 acc1, v8cacc64 acc2, int zero_acc1, int shift16, int sub_mask, int sub_mul, int sub_acc1, int sub_acc2) |
elem_8 with dynamic sign and dynamic negation of multiplication result | |
| v8cacc64 | mul_elem_8_conf (v8cint32 a, int sgn_x, v16cint16 b, int sgn_y, int sub_mask, int sub_mul) |
| v8cacc64 | negmul_elem_8_conf (v8cint32 a, int sgn_x, v16cint16 b, int sgn_y, int sub_mask, int sub_mul) |
| v8cacc64 | mac_elem_8_conf (v8cint32 a, int sgn_x, v16cint16 b, int sgn_y, v8cacc64 acc, int zero_acc, int shift16, int sub_mask, int sub_mul, int sub_acc1) |
| v8cacc64 | msc_elem_8_conf (v8cint32 a, int sgn_x, v16cint16 b, int sgn_y, v8cacc64 acc, int zero_acc, int shift16, int sub_mask, int sub_mul, int sub_acc1) |
| v8cacc64 | addmac_elem_8_conf (v8cint32 a, int sgn_x, v16cint16 b, int sgn_y, v8cacc64 acc1, v8cacc64 acc2, int zero_acc1, int shift16, int sub_mask, int sub_mul, int sub_acc1, int sub_acc2) |
| v8cacc64 | addmsc_elem_8_conf (v8cint32 a, int sgn_x, v16cint16 b, int sgn_y, v8cacc64 acc1, v8cacc64 acc2, int zero_acc1, int shift16, int sub_mask, int sub_mul, int sub_acc1, int sub_acc2) |
| v8cacc64 | mul_elem_8_conf (v8cint32 a, int sgn_x, cint16 b, int sgn_y, int sub_mask, int sub_mul) |
| v8cacc64 | negmul_elem_8_conf (v8cint32 a, int sgn_x, cint16 b, int sgn_y, int sub_mask, int sub_mul) |
| v8cacc64 | mac_elem_8_conf (v8cint32 a, int sgn_x, cint16 b, int sgn_y, v8cacc64 acc, int zero_acc, int shift16, int sub_mask, int sub_mul, int sub_acc1) |
| v8cacc64 | msc_elem_8_conf (v8cint32 a, int sgn_x, cint16 b, int sgn_y, v8cacc64 acc, int zero_acc, int shift16, int sub_mask, int sub_mul, int sub_acc1) |
| v8cacc64 | addmac_elem_8_conf (v8cint32 a, int sgn_x, cint16 b, int sgn_y, v8cacc64 acc1, v8cacc64 acc2, int zero_acc1, int shift16, int sub_mask, int sub_mul, int sub_acc1, int sub_acc2) |
| v8cacc64 | addmsc_elem_8_conf (v8cint32 a, int sgn_x, cint16 b, int sgn_y, v8cacc64 acc1, v8cacc64 acc2, int zero_acc1, int shift16, int sub_mask, int sub_mul, int sub_acc1, int sub_acc2) |
elem_16 | |
| v16cacc64 | mul_elem_16 (v16cint32 a, v16cint16 b) |
| v16cacc64 | negmul_elem_16 (v16cint32 a, v16cint16 b) |
| v16cacc64 | mac_elem_16 (v16cint32 a, v16cint16 b, v16cacc64 acc) |
| v16cacc64 | msc_elem_16 (v16cint32 a, v16cint16 b, v16cacc64 acc) |
| v16cacc64 | addmac_elem_16 (v16cint32 a, v16cint16 b, v16cacc64 acc1, v16cacc64 acc2) |
| v16cacc64 | addmsc_elem_16 (v16cint32 a, v16cint16 b, v16cacc64 acc1, v16cacc64 acc2) |
elem_16 with dynamic sign | |
| v16cacc64 | mul_elem_16 (v16cint32 a, int sgn_x, v16cint16 b, int sgn_y) |
| v16cacc64 | negmul_elem_16 (v16cint32 a, int sgn_x, v16cint16 b, int sgn_y) |
| v16cacc64 | mac_elem_16 (v16cint32 a, int sgn_x, v16cint16 b, int sgn_y, v16cacc64 acc) |
| v16cacc64 | msc_elem_16 (v16cint32 a, int sgn_x, v16cint16 b, int sgn_y, v16cacc64 acc) |
| v16cacc64 | addmac_elem_16 (v16cint32 a, int sgn_x, v16cint16 b, int sgn_y, v16cacc64 acc1, v16cacc64 acc2) |
| v16cacc64 | addmsc_elem_16 (v16cint32 a, int sgn_x, v16cint16 b, int sgn_y, v16cacc64 acc1, v16cacc64 acc2) |
elem_16 with dynamic negation of multiplication result | |
| v16cacc64 | mul_elem_16_conf (v16cint32 a, v16cint16 b, int sub_mask, int sub_mul) |
| v16cacc64 | negmul_elem_16_conf (v16cint32 a, v16cint16 b, int sub_mask, int sub_mul) |
elem_16 with dynamic negation of multiplication result, zeroing of acc1, negation of acc1 | |
| v16cacc64 | mac_elem_16_conf (v16cint32 a, v16cint16 b, v16cacc64 acc, int zero_acc, int shift16, int sub_mask, int sub_mul, int sub_acc1) |
| v16cacc64 | msc_elem_16_conf (v16cint32 a, v16cint16 b, v16cacc64 acc, int zero_acc, int shift16, int sub_mask, int sub_mul, int sub_acc1) |
| v16cacc64 | addmac_elem_16_conf (v16cint32 a, v16cint16 b, v16cacc64 acc1, v16cacc64 acc2, int zero_acc1, int shift16, int sub_mask, int sub_mul, int sub_acc1, int sub_acc2) |
| v16cacc64 | addmsc_elem_16_conf (v16cint32 a, v16cint16 b, v16cacc64 acc1, v16cacc64 acc2, int zero_acc1, int shift16, int sub_mask, int sub_mul, int sub_acc1, int sub_acc2) |
elem_16 with dynamic sign and dynamic negation of multiplication result | |
| v16cacc64 | mul_elem_16_conf (v16cint32 a, int sgn_x, v16cint16 b, int sgn_y, int sub_mask, int sub_mul) |
| v16cacc64 | negmul_elem_16_conf (v16cint32 a, int sgn_x, v16cint16 b, int sgn_y, int sub_mask, int sub_mul) |
| v16cacc64 | mac_elem_16_conf (v16cint32 a, int sgn_x, v16cint16 b, int sgn_y, v16cacc64 acc, int zero_acc, int shift16, int sub_mask, int sub_mul, int sub_acc1) |
| v16cacc64 | msc_elem_16_conf (v16cint32 a, int sgn_x, v16cint16 b, int sgn_y, v16cacc64 acc, int zero_acc, int shift16, int sub_mask, int sub_mul, int sub_acc1) |
| v16cacc64 | addmac_elem_16_conf (v16cint32 a, int sgn_x, v16cint16 b, int sgn_y, v16cacc64 acc1, v16cacc64 acc2, int zero_acc1, int shift16, int sub_mask, int sub_mul, int sub_acc1, int sub_acc2) |
| v16cacc64 | addmsc_elem_16_conf (v16cint32 a, int sgn_x, v16cint16 b, int sgn_y, v16cacc64 acc1, v16cacc64 acc2, int zero_acc1, int shift16, int sub_mask, int sub_mul, int sub_acc1, int sub_acc2) |
Channel by channel complex multiplication of (1x1) with (1x1) with a & b conjugate | |
| v8cacc64 | mul_elem_8_cc (v8cint32 a, v16cint16 b) |
| v8cacc64 | negmul_elem_8_cc (v8cint32 a, v16cint16 b) |
| v8cacc64 | mac_elem_8_cc (v8cint32 a, v16cint16 b, v8cacc64 acc1) |
| v8cacc64 | msc_elem_8_cc (v8cint32 a, v16cint16 b, v8cacc64 acc1) |
| v8cacc64 | addmac_elem_8_cc (v8cint32 a, v16cint16 b, v8cacc64 acc1, v8cacc64 acc2) |
| v8cacc64 | addmsc_elem_8_cc (v8cint32 a, v16cint16 b, v8cacc64 acc1, v8cacc64 acc2) |
Channel by channel complex multiplication of (1x1) with (1x1) with a conjugate only | |
| v8cacc64 | mul_elem_8_cn (v8cint32 a, v16cint16 b) |
| v8cacc64 | negmul_elem_8_cn (v8cint32 a, v16cint16 b) |
| v8cacc64 | mac_elem_8_cn (v8cint32 a, v16cint16 b, v8cacc64 acc1) |
| v8cacc64 | msc_elem_8_cn (v8cint32 a, v16cint16 b, v8cacc64 acc1) |
| v8cacc64 | addmac_elem_8_cn (v8cint32 a, v16cint16 b, v8cacc64 acc1, v8cacc64 acc2) |
| v8cacc64 | addmsc_elem_8_cn (v8cint32 a, v16cint16 b, v8cacc64 acc1, v8cacc64 acc2) |
Channel by channel complex multiplication of (1x1) with (1x1) with b conjugate only | |
| v8cacc64 | mul_elem_8_nc (v8cint32 a, v16cint16 b) |
| v8cacc64 | negmul_elem_8_nc (v8cint32 a, v16cint16 b) |
| v8cacc64 | mac_elem_8_nc (v8cint32 a, v16cint16 b, v8cacc64 acc1) |
| v8cacc64 | msc_elem_8_nc (v8cint32 a, v16cint16 b, v8cacc64 acc1) |
| v8cacc64 | addmac_elem_8_nc (v8cint32 a, v16cint16 b, v8cacc64 acc1, v8cacc64 acc2) |
| v8cacc64 | addmsc_elem_8_nc (v8cint32 a, v16cint16 b, v8cacc64 acc1, v8cacc64 acc2) |
| v16cacc64 addmac_elem_16 | ( | v16cint32 | a, |
| int | sgn_x, | ||
| v16cint16 | b, | ||
| int | sgn_y, | ||
| v16cacc64 | acc1, | ||
| v16cacc64 | acc2 ) |
| v16cacc64 addmac_elem_16_conf | ( | v16cint32 | a, |
| int | sgn_x, | ||
| v16cint16 | b, | ||
| int | sgn_y, | ||
| v16cacc64 | acc1, | ||
| v16cacc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v16cacc64 addmac_elem_16_conf | ( | v16cint32 | a, |
| v16cint16 | b, | ||
| v16cacc64 | acc1, | ||
| v16cacc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v8cacc64 addmac_elem_8 | ( | v8cint32 | a, |
| int | sgn_x, | ||
| v16cint16 | b, | ||
| int | sgn_y, | ||
| v8cacc64 | acc1, | ||
| v8cacc64 | acc2 ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v8cacc64 addmac_elem_8_conf | ( | v8cint32 | a, |
| cint16 | b, | ||
| v8cacc64 | acc1, | ||
| v8cacc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v8cacc64 addmac_elem_8_conf | ( | v8cint32 | a, |
| int | sgn_x, | ||
| cint16 | b, | ||
| int | sgn_y, | ||
| v8cacc64 | acc1, | ||
| v8cacc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v8cacc64 addmac_elem_8_conf | ( | v8cint32 | a, |
| int | sgn_x, | ||
| v16cint16 | b, | ||
| int | sgn_y, | ||
| v8cacc64 | acc1, | ||
| v8cacc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v8cacc64 addmac_elem_8_conf | ( | v8cint32 | a, |
| v16cint16 | b, | ||
| v8cacc64 | acc1, | ||
| v8cacc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16cacc64 addmsc_elem_16 | ( | v16cint32 | a, |
| int | sgn_x, | ||
| v16cint16 | b, | ||
| int | sgn_y, | ||
| v16cacc64 | acc1, | ||
| v16cacc64 | acc2 ) |
| v16cacc64 addmsc_elem_16_conf | ( | v16cint32 | a, |
| int | sgn_x, | ||
| v16cint16 | b, | ||
| int | sgn_y, | ||
| v16cacc64 | acc1, | ||
| v16cacc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v16cacc64 addmsc_elem_16_conf | ( | v16cint32 | a, |
| v16cint16 | b, | ||
| v16cacc64 | acc1, | ||
| v16cacc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v8cacc64 addmsc_elem_8 | ( | v8cint32 | a, |
| int | sgn_x, | ||
| v16cint16 | b, | ||
| int | sgn_y, | ||
| v8cacc64 | acc1, | ||
| v8cacc64 | acc2 ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v8cacc64 addmsc_elem_8_conf | ( | v8cint32 | a, |
| cint16 | b, | ||
| v8cacc64 | acc1, | ||
| v8cacc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v8cacc64 addmsc_elem_8_conf | ( | v8cint32 | a, |
| int | sgn_x, | ||
| cint16 | b, | ||
| int | sgn_y, | ||
| v8cacc64 | acc1, | ||
| v8cacc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v8cacc64 addmsc_elem_8_conf | ( | v8cint32 | a, |
| int | sgn_x, | ||
| v16cint16 | b, | ||
| int | sgn_y, | ||
| v8cacc64 | acc1, | ||
| v8cacc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| v8cacc64 addmsc_elem_8_conf | ( | v8cint32 | a, |
| v16cint16 | b, | ||
| v8cacc64 | acc1, | ||
| v8cacc64 | acc2, | ||
| int | zero_acc1, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1, | ||
| int | sub_acc2 ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| acc2 | Accumulator 2 input |
| v16cacc64 mac_elem_16_conf | ( | v16cint32 | a, |
| int | sgn_x, | ||
| v16cint16 | b, | ||
| int | sgn_y, | ||
| v16cacc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v16cacc64 mac_elem_16_conf | ( | v16cint32 | a, |
| v16cint16 | b, | ||
| v16cacc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| v8cacc64 mac_elem_8_conf | ( | v8cint32 | a, |
| cint16 | b, | ||
| v8cacc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v8cacc64 mac_elem_8_conf | ( | v8cint32 | a, |
| int | sgn_x, | ||
| cint16 | b, | ||
| int | sgn_y, | ||
| v8cacc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v8cacc64 mac_elem_8_conf | ( | v8cint32 | a, |
| int | sgn_x, | ||
| v16cint16 | b, | ||
| int | sgn_y, | ||
| v8cacc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v8cacc64 mac_elem_8_conf | ( | v8cint32 | a, |
| v16cint16 | b, | ||
| v8cacc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| v16cacc64 msc_elem_16_conf | ( | v16cint32 | a, |
| int | sgn_x, | ||
| v16cint16 | b, | ||
| int | sgn_y, | ||
| v16cacc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v16cacc64 msc_elem_16_conf | ( | v16cint32 | a, |
| v16cint16 | b, | ||
| v16cacc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| v8cacc64 msc_elem_8_conf | ( | v8cint32 | a, |
| cint16 | b, | ||
| v8cacc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v8cacc64 msc_elem_8_conf | ( | v8cint32 | a, |
| int | sgn_x, | ||
| cint16 | b, | ||
| int | sgn_y, | ||
| v8cacc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v8cacc64 msc_elem_8_conf | ( | v8cint32 | a, |
| int | sgn_x, | ||
| v16cint16 | b, | ||
| int | sgn_y, | ||
| v8cacc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| v8cacc64 msc_elem_8_conf | ( | v8cint32 | a, |
| v16cint16 | b, | ||
| v8cacc64 | acc, | ||
| int | zero_acc, | ||
| int | shift16, | ||
| int | sub_mask, | ||
| int | sub_mul, | ||
| int | sub_acc1 ) |
| a | Matrix A |
| b | Matrix B |
| acc1 | Accumulator 1 input |
| v16cacc64 mul_elem_16_conf | ( | v16cint32 | a, |
| int | sgn_x, | ||
| v16cint16 | b, | ||
| int | sgn_y, | ||
| int | sub_mask, | ||
| int | sub_mul ) |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| b | Matrix B |
| v8cacc64 mul_elem_8_conf | ( | v8cint32 | a, |
| int | sgn_x, | ||
| v16cint16 | b, | ||
| int | sgn_y, | ||
| int | sub_mask, | ||
| int | sub_mul ) |
| a | Matrix A |
| b | Matrix B |
| v16cacc64 negmul_elem_16_conf | ( | v16cint32 | a, |
| int | sgn_x, | ||
| v16cint16 | b, | ||
| int | sgn_y, | ||
| int | sub_mask, | ||
| int | sub_mul ) |
| a | Matrix A |
| b | Matrix B |
| a | Matrix A |
| b | Matrix B |
| v8cacc64 negmul_elem_8_conf | ( | v8cint32 | a, |
| int | sgn_x, | ||
| cint16 | b, | ||
| int | sgn_y, | ||
| int | sub_mask, | ||
| int | sub_mul ) |
| v8cacc64 negmul_elem_8_conf | ( | v8cint32 | a, |
| int | sgn_x, | ||
| v16cint16 | b, | ||
| int | sgn_y, | ||
| int | sub_mask, | ||
| int | sub_mul ) |