AI Engine-ML v2 Intrinsics User Guide  v2025.1
Loading...
Searching...
No Matches

Vector packing operations (dynamic sign)

These intrinsics perform saturation based on the control register here: Control Register. There is also the variant using local saturation mode (see _conf intrinsics). Rounding is not done. No status flags are updated.

Parameters
vThe input vector
signindicates the sign of the pack conversion
v32int8 pack (v32int16 v, int sign)
 
v32uint8 pack (v32uint16 v, int sign)
 
v64int4 pack (v64int8 v, int sign)
 
v64uint4 pack (v64uint8 v, int sign)
 
v64int8 pack (v64int16 v, int sign)
 
v64uint8 pack (v64uint16 v, int sign)
 
v128int4 pack (v128int8 v, int sign)
 
v128uint4 pack (v128uint8 v, int sign)
 
v32int8 pack_conf (v32int16 v, int sign, crsat_t sat)
 
v32uint8 pack_conf (v32uint16 v, int sign, crsat_t sat)
 
v64int4 pack_conf (v64int8 v, int sign, crsat_t sat)
 
v64uint4 pack_conf (v64uint8 v, int sign, crsat_t sat)
 
v64int8 pack_conf (v64int16 v, int sign, crsat_t sat)
 
v64uint8 pack_conf (v64uint16 v, int sign, crsat_t sat)
 
v128int4 pack_conf (v128int8 v, int sign, crsat_t sat)
 
v128uint4 pack_conf (v128uint8 v, int sign, crsat_t sat)
 

Vector packing operations

These intrinsics perform saturation based on the control register here: Control Register. There is also the variant using local saturation mode (see _conf intrinsics). Rounding is not done. No status flags are updated.

Parameters
vThe input vector
v32int8 pack (v32int16 v)
 
v32uint8 pack (v32uint16 v)
 
v64int4 pack (v64int8 v)
 
v64uint4 pack (v64uint8 v)
 
v64int8 pack (v64int16 v)
 
v64uint8 pack (v64uint16 v)
 
v128int4 pack (v128int8 v)
 
v128uint4 pack (v128uint8 v)
 
v32int8 pack_conf (v32int16 v, crsat_t sat)
 
v32uint8 pack_conf (v32uint16 v, crsat_t sat)
 
v64int4 pack_conf (v64int8 v, crsat_t sat)
 
v64uint4 pack_conf (v64uint8 v, crsat_t sat)
 
v64int8 pack_conf (v64int16 v, crsat_t sat)
 
v64uint8 pack_conf (v64uint16 v, crsat_t sat)
 
v128int4 pack_conf (v128int8 v, crsat_t sat)
 
v128uint4 pack_conf (v128uint8 v, crsat_t sat)
 

Vector unpacking operations (dynamic sign)

Parameters
vThe input vector
signindicates the sign of the pack conversion
v32int16 unpack (v32int8 v, uint1_t sign)
 
v32uint16 unpack (v32uint8 v, uint1_t sign)
 
v64int8 unpack (v64int4 v, uint1_t sign)
 
v64uint8 unpack (v64uint4 v, uint1_t sign)
 
v64int16 unpack (v64int8 v, uint1_t sign)
 
v64uint16 unpack (v64uint8 v, uint1_t sign)
 
v128int8 unpack (v128int4 v, uint1_t sign)
 
v128uint8 unpack (v128uint4 v, uint1_t sign)
 

Vector unpacking operations

Parameters
vThe input vector
v32int16 unpack (v32int8 v)
 
v32uint16 unpack (v32uint8 v)
 
v64int8 unpack (v64int4 v)
 
v64uint8 unpack (v64uint4 v)
 
v64int16 unpack (v64int8 v)
 
v64uint16 unpack (v64uint8 v)
 
v128int8 unpack (v128int4 v)
 
v128uint8 unpack (v128uint4 v)
 

Detailed Description

Pack/unpack operations convert between two representations of vector types.

Function Documentation

◆ pack() [1/16]

v128int4 pack ( v128int8 v)

◆ pack() [2/16]

v128int4 pack ( v128int8 v,
int sign )

◆ pack() [3/16]

v128uint4 pack ( v128uint8 v)

◆ pack() [4/16]

v128uint4 pack ( v128uint8 v,
int sign )

◆ pack() [5/16]

v32int8 pack ( v32int16 v)

◆ pack() [6/16]

v32int8 pack ( v32int16 v,
int sign )

◆ pack() [7/16]

v32uint8 pack ( v32uint16 v)

◆ pack() [8/16]

v32uint8 pack ( v32uint16 v,
int sign )

◆ pack() [9/16]

v64int8 pack ( v64int16 v)

◆ pack() [10/16]

v64int8 pack ( v64int16 v,
int sign )

◆ pack() [11/16]

v64int4 pack ( v64int8 v)

◆ pack() [12/16]

v64int4 pack ( v64int8 v,
int sign )

◆ pack() [13/16]

v64uint8 pack ( v64uint16 v)

◆ pack() [14/16]

v64uint8 pack ( v64uint16 v,
int sign )

◆ pack() [15/16]

v64uint4 pack ( v64uint8 v)

◆ pack() [16/16]

v64uint4 pack ( v64uint8 v,
int sign )

◆ pack_conf() [1/16]

v128int4 pack_conf ( v128int8 v,
crsat_t sat )

◆ pack_conf() [2/16]

v128int4 pack_conf ( v128int8 v,
int sign,
crsat_t sat )

◆ pack_conf() [3/16]

v128uint4 pack_conf ( v128uint8 v,
crsat_t sat )

◆ pack_conf() [4/16]

v128uint4 pack_conf ( v128uint8 v,
int sign,
crsat_t sat )

◆ pack_conf() [5/16]

v32int8 pack_conf ( v32int16 v,
crsat_t sat )

◆ pack_conf() [6/16]

v32int8 pack_conf ( v32int16 v,
int sign,
crsat_t sat )

◆ pack_conf() [7/16]

v32uint8 pack_conf ( v32uint16 v,
crsat_t sat )

◆ pack_conf() [8/16]

v32uint8 pack_conf ( v32uint16 v,
int sign,
crsat_t sat )

◆ pack_conf() [9/16]

v64int8 pack_conf ( v64int16 v,
crsat_t sat )

◆ pack_conf() [10/16]

v64int8 pack_conf ( v64int16 v,
int sign,
crsat_t sat )

◆ pack_conf() [11/16]

v64int4 pack_conf ( v64int8 v,
crsat_t sat )

◆ pack_conf() [12/16]

v64int4 pack_conf ( v64int8 v,
int sign,
crsat_t sat )

◆ pack_conf() [13/16]

v64uint8 pack_conf ( v64uint16 v,
crsat_t sat )

◆ pack_conf() [14/16]

v64uint8 pack_conf ( v64uint16 v,
int sign,
crsat_t sat )

◆ pack_conf() [15/16]

v64uint4 pack_conf ( v64uint8 v,
crsat_t sat )

◆ pack_conf() [16/16]

v64uint4 pack_conf ( v64uint8 v,
int sign,
crsat_t sat )

◆ unpack() [1/16]

v128int8 unpack ( v128int4 v)

◆ unpack() [2/16]

v128int8 unpack ( v128int4 v,
uint1_t sign )

◆ unpack() [3/16]

v128uint8 unpack ( v128uint4 v)

◆ unpack() [4/16]

v128uint8 unpack ( v128uint4 v,
uint1_t sign )

◆ unpack() [5/16]

v32int16 unpack ( v32int8 v)

◆ unpack() [6/16]

v32int16 unpack ( v32int8 v,
uint1_t sign )

◆ unpack() [7/16]

v32uint16 unpack ( v32uint8 v)

◆ unpack() [8/16]

v32uint16 unpack ( v32uint8 v,
uint1_t sign )

◆ unpack() [9/16]

v64int8 unpack ( v64int4 v)

◆ unpack() [10/16]

v64int8 unpack ( v64int4 v,
uint1_t sign )

◆ unpack() [11/16]

v64int16 unpack ( v64int8 v)

◆ unpack() [12/16]

v64int16 unpack ( v64int8 v,
uint1_t sign )

◆ unpack() [13/16]

v64uint8 unpack ( v64uint4 v)

◆ unpack() [14/16]

v64uint8 unpack ( v64uint4 v,
uint1_t sign )

◆ unpack() [15/16]

v64uint16 unpack ( v64uint8 v)

◆ unpack() [16/16]

v64uint16 unpack ( v64uint8 v,
uint1_t sign )