| AI Engine-ML v2 Intrinsics User Guide v2025.2

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Multiply-accumulate of 32b x 16b integer datatypes
Vector Operations » Multiply Accumulate

## 4x2_2x8
v32acc64 | mul_4x2_2x8 (v16uint32 a, v32uint16 b)
v32acc64 | negmul_4x2_2x8 (v16uint32 a, v32uint16 b)
v32acc64 | mac_4x2_2x8 (v16uint32 a, v32uint16 b, v32acc64 acc)
v32acc64 | msc_4x2_2x8 (v16uint32 a, v32uint16 b, v32acc64 acc)
v32acc64 | addmac_4x2_2x8 (v16uint32 a, v32uint16 b, v32acc64 acc1, v32acc64 acc2)
v32acc64 | addmsc_4x2_2x8 (v16uint32 a, v32uint16 b, v32acc64 acc1, v32acc64 acc2)
v32acc64 | mul_4x2_2x8 (v16uint32 a, v32int16 b)
v32acc64 | negmul_4x2_2x8 (v16uint32 a, v32int16 b)
v32acc64 | mac_4x2_2x8 (v16uint32 a, v32int16 b, v32acc64 acc)
v32acc64 | msc_4x2_2x8 (v16uint32 a, v32int16 b, v32acc64 acc)
v32acc64 | addmac_4x2_2x8 (v16uint32 a, v32int16 b, v32acc64 acc1, v32acc64 acc2)
v32acc64 | addmsc_4x2_2x8 (v16uint32 a, v32int16 b, v32acc64 acc1, v32acc64 acc2)
v32acc64 | mul_4x2_2x8 (v16int32 a, v32uint16 b)
v32acc64 | negmul_4x2_2x8 (v16int32 a, v32uint16 b)
v32acc64 | mac_4x2_2x8 (v16int32 a, v32uint16 b, v32acc64 acc)
v32acc64 | msc_4x2_2x8 (v16int32 a, v32uint16 b, v32acc64 acc)
v32acc64 | addmac_4x2_2x8 (v16int32 a, v32uint16 b, v32acc64 acc1, v32acc64 acc2)
v32acc64 | addmsc_4x2_2x8 (v16int32 a, v32uint16 b, v32acc64 acc1, v32acc64 acc2)
v32acc64 | mul_4x2_2x8 (v16int32 a, v32int16 b)
v32acc64 | negmul_4x2_2x8 (v16int32 a, v32int16 b)
v32acc64 | mac_4x2_2x8 (v16int32 a, v32int16 b, v32acc64 acc)
v32acc64 | msc_4x2_2x8 (v16int32 a, v32int16 b, v32acc64 acc)
v32acc64 | addmac_4x2_2x8 (v16int32 a, v32int16 b, v32acc64 acc1, v32acc64 acc2)
v32acc64 | addmsc_4x2_2x8 (v16int32 a, v32int16 b, v32acc64 acc1, v32acc64 acc2)

## 4x2_2x8 with dynamic sign
v32acc64 | mul_4x2_2x8 (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y)
v32acc64 | negmul_4x2_2x8 (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y)
v32acc64 | mac_4x2_2x8 (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, v32acc64 acc)
v32acc64 | msc_4x2_2x8 (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, v32acc64 acc)
v32acc64 | addmac_4x2_2x8 (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, v32acc64 acc1, v32acc64 acc2)
v32acc64 | addmsc_4x2_2x8 (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, v32acc64 acc1, v32acc64 acc2)
v32acc64 | mul_4x2_2x8 (v16uint32 a, int sgn_x, v32int16 b, int sgn_y)
v32acc64 | negmul_4x2_2x8 (v16uint32 a, int sgn_x, v32int16 b, int sgn_y)
v32acc64 | mac_4x2_2x8 (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, v32acc64 acc)
v32acc64 | msc_4x2_2x8 (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, v32acc64 acc)
v32acc64 | addmac_4x2_2x8 (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, v32acc64 acc1, v32acc64 acc2)
v32acc64 | addmsc_4x2_2x8 (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, v32acc64 acc1, v32acc64 acc2)
v32acc64 | mul_4x2_2x8 (v16int32 a, int sgn_x, v32uint16 b, int sgn_y)
v32acc64 | negmul_4x2_2x8 (v16int32 a, int sgn_x, v32uint16 b, int sgn_y)
v32acc64 | mac_4x2_2x8 (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, v32acc64 acc)
v32acc64 | msc_4x2_2x8 (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, v32acc64 acc)
v32acc64 | addmac_4x2_2x8 (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, v32acc64 acc1, v32acc64 acc2)
v32acc64 | addmsc_4x2_2x8 (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, v32acc64 acc1, v32acc64 acc2)
v32acc64 | mul_4x2_2x8 (v16int32 a, int sgn_x, v32int16 b, int sgn_y)
v32acc64 | negmul_4x2_2x8 (v16int32 a, int sgn_x, v32int16 b, int sgn_y)
v32acc64 | mac_4x2_2x8 (v16int32 a, int sgn_x, v32int16 b, int sgn_y, v32acc64 acc)
v32acc64 | msc_4x2_2x8 (v16int32 a, int sgn_x, v32int16 b, int sgn_y, v32acc64 acc)
v32acc64 | addmac_4x2_2x8 (v16int32 a, int sgn_x, v32int16 b, int sgn_y, v32acc64 acc1, v32acc64 acc2)
v32acc64 | addmsc_4x2_2x8 (v16int32 a, int sgn_x, v32int16 b, int sgn_y, v32acc64 acc1, v32acc64 acc2)

## 4x2_2x8 with dynamic negation of multiplication result
v32acc64 | mul_4x2_2x8_conf (v16uint32 a, v32uint16 b, int sub_mul)
v32acc64 | negmul_4x2_2x8_conf (v16uint32 a, v32uint16 b, int sub_mul)
v32acc64 | mul_4x2_2x8_conf (v16uint32 a, v32int16 b, int sub_mul)
v32acc64 | negmul_4x2_2x8_conf (v16uint32 a, v32int16 b, int sub_mul)
v32acc64 | mul_4x2_2x8_conf (v16int32 a, v32uint16 b, int sub_mul)
v32acc64 | negmul_4x2_2x8_conf (v16int32 a, v32uint16 b, int sub_mul)
v32acc64 | mul_4x2_2x8_conf (v16int32 a, v32int16 b, int sub_mul)
v32acc64 | negmul_4x2_2x8_conf (v16int32 a, v32int16 b, int sub_mul)

## 4x2_2x8 with dynamic negation of multiplication result, zeroing of acc1, negation of acc1
v32acc64 | mac_4x2_2x8_conf (v16uint32 a, v32uint16 b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1)
v32acc64 | msc_4x2_2x8_conf (v16uint32 a, v32uint16 b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1)
v32acc64 | addmac_4x2_2x8_conf (v16uint32 a, v32uint16 b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2)
v32acc64 | addmsc_4x2_2x8_conf (v16uint32 a, v32uint16 b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2)
v32acc64 | mac_4x2_2x8_conf (v16uint32 a, v32int16 b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1)
v32acc64 | msc_4x2_2x8_conf (v16uint32 a, v32int16 b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1)
v32acc64 | addmac_4x2_2x8_conf (v16uint32 a, v32int16 b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2)
v32acc64 | addmsc_4x2_2x8_conf (v16uint32 a, v32int16 b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2)
v32acc64 | mac_4x2_2x8_conf (v16int32 a, v32uint16 b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1)
v32acc64 | msc_4x2_2x8_conf (v16int32 a, v32uint16 b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1)
v32acc64 | addmac_4x2_2x8_conf (v16int32 a, v32uint16 b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2)
v32acc64 | addmsc_4x2_2x8_conf (v16int32 a, v32uint16 b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2)
v32acc64 | mac_4x2_2x8_conf (v16int32 a, v32int16 b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1)
v32acc64 | msc_4x2_2x8_conf (v16int32 a, v32int16 b, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1)
v32acc64 | addmac_4x2_2x8_conf (v16int32 a, v32int16 b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2)
v32acc64 | addmsc_4x2_2x8_conf (v16int32 a, v32int16 b, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2)

## 4x2_2x8 with dynamic sign and dynamic negation of multiplication result
v32acc64 | mul_4x2_2x8_conf (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, int sub_mul)
v32acc64 | negmul_4x2_2x8_conf (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, int sub_mul)
v32acc64 | mac_4x2_2x8_conf (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1)
v32acc64 | msc_4x2_2x8_conf (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1)
v32acc64 | addmac_4x2_2x8_conf (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2)
v32acc64 | addmsc_4x2_2x8_conf (v16uint32 a, int sgn_x, v32uint16 b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2)
v32acc64 | mul_4x2_2x8_conf (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, int sub_mul)
v32acc64 | negmul_4x2_2x8_conf (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, int sub_mul)
v32acc64 | mac_4x2_2x8_conf (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1)
v32acc64 | msc_4x2_2x8_conf (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1)
v32acc64 | addmac_4x2_2x8_conf (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2)
v32acc64 | addmsc_4x2_2x8_conf (v16uint32 a, int sgn_x, v32int16 b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2)
v32acc64 | mul_4x2_2x8_conf (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, int sub_mul)
v32acc64 | negmul_4x2_2x8_conf (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, int sub_mul)
v32acc64 | mac_4x2_2x8_conf (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1)
v32acc64 | msc_4x2_2x8_conf (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1)
v32acc64 | addmac_4x2_2x8_conf (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2)
v32acc64 | addmsc_4x2_2x8_conf (v16int32 a, int sgn_x, v32uint16 b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2)
v32acc64 | mul_4x2_2x8_conf (v16int32 a, int sgn_x, v32int16 b, int sgn_y, int sub_mul)
v32acc64 | negmul_4x2_2x8_conf (v16int32 a, int sgn_x, v32int16 b, int sgn_y, int sub_mul)
v32acc64 | mac_4x2_2x8_conf (v16int32 a, int sgn_x, v32int16 b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1)
v32acc64 | msc_4x2_2x8_conf (v16int32 a, int sgn_x, v32int16 b, int sgn_y, v32acc64 acc, int zero_acc, int shift16, int sub_mul, int sub_acc1)
v32acc64 | addmac_4x2_2x8_conf (v16int32 a, int sgn_x, v32int16 b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2)
v32acc64 | addmsc_4x2_2x8_conf (v16int32 a, int sgn_x, v32int16 b, int sgn_y, v32acc64 acc1, v32acc64 acc2, int zero_acc1, int shift16, int sub_mul, int sub_acc1, int sub_acc2)

## Detailed Description

## Function Documentation

## ◆ addmac_4x2_2x8() [1/8]

v32acc64 addmac_4x2_2x8 | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2 )

## ◆ addmac_4x2_2x8() [2/8]

v32acc64 addmac_4x2_2x8 | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2 )

## ◆ addmac_4x2_2x8() [3/8]

v32acc64 addmac_4x2_2x8 | ( | v16int32 | a,
|  | v32int16 | b,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2 )

## ◆ addmac_4x2_2x8() [4/8]

v32acc64 addmac_4x2_2x8 | ( | v16int32 | a,
|  | v32uint16 | b,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2 )

## ◆ addmac_4x2_2x8() [5/8]

v32acc64 addmac_4x2_2x8 | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2 )

## ◆ addmac_4x2_2x8() [6/8]

v32acc64 addmac_4x2_2x8 | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2 )

## ◆ addmac_4x2_2x8() [7/8]

v32acc64 addmac_4x2_2x8 | ( | v16uint32 | a,
|  | v32int16 | b,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2 )

## ◆ addmac_4x2_2x8() [8/8]

v32acc64 addmac_4x2_2x8 | ( | v16uint32 | a,
|  | v32uint16 | b,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2 )

## ◆ addmac_4x2_2x8_conf() [1/8]

v32acc64 addmac_4x2_2x8_conf | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2,
|  | int | zero_acc1,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1,
|  | int | sub_acc2 )

## ◆ addmac_4x2_2x8_conf() [2/8]

v32acc64 addmac_4x2_2x8_conf | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2,
|  | int | zero_acc1,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1,
|  | int | sub_acc2 )

## ◆ addmac_4x2_2x8_conf() [3/8]

v32acc64 addmac_4x2_2x8_conf | ( | v16int32 | a,
|  | v32int16 | b,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2,
|  | int | zero_acc1,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1,
|  | int | sub_acc2 )

## ◆ addmac_4x2_2x8_conf() [4/8]

v32acc64 addmac_4x2_2x8_conf | ( | v16int32 | a,
|  | v32uint16 | b,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2,
|  | int | zero_acc1,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1,
|  | int | sub_acc2 )

## ◆ addmac_4x2_2x8_conf() [5/8]

v32acc64 addmac_4x2_2x8_conf | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2,
|  | int | zero_acc1,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1,
|  | int | sub_acc2 )

## ◆ addmac_4x2_2x8_conf() [6/8]

v32acc64 addmac_4x2_2x8_conf | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2,
|  | int | zero_acc1,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1,
|  | int | sub_acc2 )

## ◆ addmac_4x2_2x8_conf() [7/8]

v32acc64 addmac_4x2_2x8_conf | ( | v16uint32 | a,
|  | v32int16 | b,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2,
|  | int | zero_acc1,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1,
|  | int | sub_acc2 )

## ◆ addmac_4x2_2x8_conf() [8/8]

v32acc64 addmac_4x2_2x8_conf | ( | v16uint32 | a,
|  | v32uint16 | b,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2,
|  | int | zero_acc1,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1,
|  | int | sub_acc2 )

## ◆ addmsc_4x2_2x8() [1/8]

v32acc64 addmsc_4x2_2x8 | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2 )

## ◆ addmsc_4x2_2x8() [2/8]

v32acc64 addmsc_4x2_2x8 | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2 )

## ◆ addmsc_4x2_2x8() [3/8]

v32acc64 addmsc_4x2_2x8 | ( | v16int32 | a,
|  | v32int16 | b,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2 )

## ◆ addmsc_4x2_2x8() [4/8]

v32acc64 addmsc_4x2_2x8 | ( | v16int32 | a,
|  | v32uint16 | b,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2 )

## ◆ addmsc_4x2_2x8() [5/8]

v32acc64 addmsc_4x2_2x8 | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2 )

## ◆ addmsc_4x2_2x8() [6/8]

v32acc64 addmsc_4x2_2x8 | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2 )

## ◆ addmsc_4x2_2x8() [7/8]

v32acc64 addmsc_4x2_2x8 | ( | v16uint32 | a,
|  | v32int16 | b,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2 )

## ◆ addmsc_4x2_2x8() [8/8]

v32acc64 addmsc_4x2_2x8 | ( | v16uint32 | a,
|  | v32uint16 | b,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2 )

## ◆ addmsc_4x2_2x8_conf() [1/8]

v32acc64 addmsc_4x2_2x8_conf | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2,
|  | int | zero_acc1,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1,
|  | int | sub_acc2 )

## ◆ addmsc_4x2_2x8_conf() [2/8]

v32acc64 addmsc_4x2_2x8_conf | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2,
|  | int | zero_acc1,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1,
|  | int | sub_acc2 )

## ◆ addmsc_4x2_2x8_conf() [3/8]

v32acc64 addmsc_4x2_2x8_conf | ( | v16int32 | a,
|  | v32int16 | b,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2,
|  | int | zero_acc1,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1,
|  | int | sub_acc2 )

## ◆ addmsc_4x2_2x8_conf() [4/8]

v32acc64 addmsc_4x2_2x8_conf | ( | v16int32 | a,
|  | v32uint16 | b,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2,
|  | int | zero_acc1,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1,
|  | int | sub_acc2 )

## ◆ addmsc_4x2_2x8_conf() [5/8]

v32acc64 addmsc_4x2_2x8_conf | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2,
|  | int | zero_acc1,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1,
|  | int | sub_acc2 )

## ◆ addmsc_4x2_2x8_conf() [6/8]

v32acc64 addmsc_4x2_2x8_conf | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2,
|  | int | zero_acc1,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1,
|  | int | sub_acc2 )

## ◆ addmsc_4x2_2x8_conf() [7/8]

v32acc64 addmsc_4x2_2x8_conf | ( | v16uint32 | a,
|  | v32int16 | b,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2,
|  | int | zero_acc1,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1,
|  | int | sub_acc2 )

## ◆ addmsc_4x2_2x8_conf() [8/8]

v32acc64 addmsc_4x2_2x8_conf | ( | v16uint32 | a,
|  | v32uint16 | b,
|  | v32acc64 | acc1,
|  | v32acc64 | acc2,
|  | int | zero_acc1,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1,
|  | int | sub_acc2 )

## ◆ mac_4x2_2x8() [1/8]

v32acc64 mac_4x2_2x8 | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc )

## ◆ mac_4x2_2x8() [2/8]

v32acc64 mac_4x2_2x8 | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc )

## ◆ mac_4x2_2x8() [3/8]

v32acc64 mac_4x2_2x8 | ( | v16int32 | a,
|  | v32int16 | b,
|  | v32acc64 | acc )

## ◆ mac_4x2_2x8() [4/8]

v32acc64 mac_4x2_2x8 | ( | v16int32 | a,
|  | v32uint16 | b,
|  | v32acc64 | acc )

## ◆ mac_4x2_2x8() [5/8]

v32acc64 mac_4x2_2x8 | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc )

## ◆ mac_4x2_2x8() [6/8]

v32acc64 mac_4x2_2x8 | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc )

## ◆ mac_4x2_2x8() [7/8]

v32acc64 mac_4x2_2x8 | ( | v16uint32 | a,
|  | v32int16 | b,
|  | v32acc64 | acc )

## ◆ mac_4x2_2x8() [8/8]

v32acc64 mac_4x2_2x8 | ( | v16uint32 | a,
|  | v32uint16 | b,
|  | v32acc64 | acc )

## ◆ mac_4x2_2x8_conf() [1/8]

v32acc64 mac_4x2_2x8_conf | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc,
|  | int | zero_acc,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1 )

## ◆ mac_4x2_2x8_conf() [2/8]

v32acc64 mac_4x2_2x8_conf | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc,
|  | int | zero_acc,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1 )

## ◆ mac_4x2_2x8_conf() [3/8]

v32acc64 mac_4x2_2x8_conf | ( | v16int32 | a,
|  | v32int16 | b,
|  | v32acc64 | acc,
|  | int | zero_acc,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1 )

## ◆ mac_4x2_2x8_conf() [4/8]

v32acc64 mac_4x2_2x8_conf | ( | v16int32 | a,
|  | v32uint16 | b,
|  | v32acc64 | acc,
|  | int | zero_acc,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1 )

## ◆ mac_4x2_2x8_conf() [5/8]

v32acc64 mac_4x2_2x8_conf | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc,
|  | int | zero_acc,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1 )

## ◆ mac_4x2_2x8_conf() [6/8]

v32acc64 mac_4x2_2x8_conf | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc,
|  | int | zero_acc,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1 )

## ◆ mac_4x2_2x8_conf() [7/8]

v32acc64 mac_4x2_2x8_conf | ( | v16uint32 | a,
|  | v32int16 | b,
|  | v32acc64 | acc,
|  | int | zero_acc,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1 )

## ◆ mac_4x2_2x8_conf() [8/8]

v32acc64 mac_4x2_2x8_conf | ( | v16uint32 | a,
|  | v32uint16 | b,
|  | v32acc64 | acc,
|  | int | zero_acc,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1 )

## ◆ msc_4x2_2x8() [1/8]

v32acc64 msc_4x2_2x8 | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc )

## ◆ msc_4x2_2x8() [2/8]

v32acc64 msc_4x2_2x8 | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc )

## ◆ msc_4x2_2x8() [3/8]

v32acc64 msc_4x2_2x8 | ( | v16int32 | a,
|  | v32int16 | b,
|  | v32acc64 | acc )

## ◆ msc_4x2_2x8() [4/8]

v32acc64 msc_4x2_2x8 | ( | v16int32 | a,
|  | v32uint16 | b,
|  | v32acc64 | acc )

## ◆ msc_4x2_2x8() [5/8]

v32acc64 msc_4x2_2x8 | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc )

## ◆ msc_4x2_2x8() [6/8]

v32acc64 msc_4x2_2x8 | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc )

## ◆ msc_4x2_2x8() [7/8]

v32acc64 msc_4x2_2x8 | ( | v16uint32 | a,
|  | v32int16 | b,
|  | v32acc64 | acc )

## ◆ msc_4x2_2x8() [8/8]

v32acc64 msc_4x2_2x8 | ( | v16uint32 | a,
|  | v32uint16 | b,
|  | v32acc64 | acc )

## ◆ msc_4x2_2x8_conf() [1/8]

v32acc64 msc_4x2_2x8_conf | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc,
|  | int | zero_acc,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1 )

## ◆ msc_4x2_2x8_conf() [2/8]

v32acc64 msc_4x2_2x8_conf | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc,
|  | int | zero_acc,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1 )

## ◆ msc_4x2_2x8_conf() [3/8]

v32acc64 msc_4x2_2x8_conf | ( | v16int32 | a,
|  | v32int16 | b,
|  | v32acc64 | acc,
|  | int | zero_acc,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1 )

## ◆ msc_4x2_2x8_conf() [4/8]

v32acc64 msc_4x2_2x8_conf | ( | v16int32 | a,
|  | v32uint16 | b,
|  | v32acc64 | acc,
|  | int | zero_acc,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1 )

## ◆ msc_4x2_2x8_conf() [5/8]

v32acc64 msc_4x2_2x8_conf | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc,
|  | int | zero_acc,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1 )

## ◆ msc_4x2_2x8_conf() [6/8]

v32acc64 msc_4x2_2x8_conf | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | v32acc64 | acc,
|  | int | zero_acc,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1 )

## ◆ msc_4x2_2x8_conf() [7/8]

v32acc64 msc_4x2_2x8_conf | ( | v16uint32 | a,
|  | v32int16 | b,
|  | v32acc64 | acc,
|  | int | zero_acc,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1 )

## ◆ msc_4x2_2x8_conf() [8/8]

v32acc64 msc_4x2_2x8_conf | ( | v16uint32 | a,
|  | v32uint16 | b,
|  | v32acc64 | acc,
|  | int | zero_acc,
|  | int | shift16,
|  | int | sub_mul,
|  | int | sub_acc1 )

## ◆ mul_4x2_2x8() [1/8]

v32acc64 mul_4x2_2x8 | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y )

## ◆ mul_4x2_2x8() [2/8]

v32acc64 mul_4x2_2x8 | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y )

## ◆ mul_4x2_2x8() [3/8]

v32acc64 mul_4x2_2x8 | ( | v16int32 | a,
|  | v32int16 | b )

## ◆ mul_4x2_2x8() [4/8]

v32acc64 mul_4x2_2x8 | ( | v16int32 | a,
|  | v32uint16 | b )

## ◆ mul_4x2_2x8() [5/8]

v32acc64 mul_4x2_2x8 | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y )

## ◆ mul_4x2_2x8() [6/8]

v32acc64 mul_4x2_2x8 | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y )

## ◆ mul_4x2_2x8() [7/8]

v32acc64 mul_4x2_2x8 | ( | v16uint32 | a,
|  | v32int16 | b )

## ◆ mul_4x2_2x8() [8/8]

v32acc64 mul_4x2_2x8 | ( | v16uint32 | a,
|  | v32uint16 | b )

## ◆ mul_4x2_2x8_conf() [1/8]

v32acc64 mul_4x2_2x8_conf | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | int | sub_mul )

## ◆ mul_4x2_2x8_conf() [2/8]

v32acc64 mul_4x2_2x8_conf | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | int | sub_mul )

## ◆ mul_4x2_2x8_conf() [3/8]

v32acc64 mul_4x2_2x8_conf | ( | v16int32 | a,
|  | v32int16 | b,
|  | int | sub_mul )

## ◆ mul_4x2_2x8_conf() [4/8]

v32acc64 mul_4x2_2x8_conf | ( | v16int32 | a,
|  | v32uint16 | b,
|  | int | sub_mul )

## ◆ mul_4x2_2x8_conf() [5/8]

v32acc64 mul_4x2_2x8_conf | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | int | sub_mul )

## ◆ mul_4x2_2x8_conf() [6/8]

v32acc64 mul_4x2_2x8_conf | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | int | sub_mul )

## ◆ mul_4x2_2x8_conf() [7/8]

v32acc64 mul_4x2_2x8_conf | ( | v16uint32 | a,
|  | v32int16 | b,
|  | int | sub_mul )

## ◆ mul_4x2_2x8_conf() [8/8]

v32acc64 mul_4x2_2x8_conf | ( | v16uint32 | a,
|  | v32uint16 | b,
|  | int | sub_mul )

## ◆ negmul_4x2_2x8() [1/8]

v32acc64 negmul_4x2_2x8 | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y )

## ◆ negmul_4x2_2x8() [2/8]

v32acc64 negmul_4x2_2x8 | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y )

## ◆ negmul_4x2_2x8() [3/8]

v32acc64 negmul_4x2_2x8 | ( | v16int32 | a,
|  | v32int16 | b )

## ◆ negmul_4x2_2x8() [4/8]

v32acc64 negmul_4x2_2x8 | ( | v16int32 | a,
|  | v32uint16 | b )

## ◆ negmul_4x2_2x8() [5/8]

v32acc64 negmul_4x2_2x8 | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y )

## ◆ negmul_4x2_2x8() [6/8]

v32acc64 negmul_4x2_2x8 | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y )

## ◆ negmul_4x2_2x8() [7/8]

v32acc64 negmul_4x2_2x8 | ( | v16uint32 | a,
|  | v32int16 | b )

## ◆ negmul_4x2_2x8() [8/8]

v32acc64 negmul_4x2_2x8 | ( | v16uint32 | a,
|  | v32uint16 | b )

## ◆ negmul_4x2_2x8_conf() [1/8]

v32acc64 negmul_4x2_2x8_conf | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | int | sub_mul )

## ◆ negmul_4x2_2x8_conf() [2/8]

v32acc64 negmul_4x2_2x8_conf | ( | v16int32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | int | sub_mul )

## ◆ negmul_4x2_2x8_conf() [3/8]

v32acc64 negmul_4x2_2x8_conf | ( | v16int32 | a,
|  | v32int16 | b,
|  | int | sub_mul )

## ◆ negmul_4x2_2x8_conf() [4/8]

v32acc64 negmul_4x2_2x8_conf | ( | v16int32 | a,
|  | v32uint16 | b,
|  | int | sub_mul )

## ◆ negmul_4x2_2x8_conf() [5/8]

v32acc64 negmul_4x2_2x8_conf | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32int16 | b,
|  | int | sgn_y,
|  | int | sub_mul )

## ◆ negmul_4x2_2x8_conf() [6/8]

v32acc64 negmul_4x2_2x8_conf | ( | v16uint32 | a,
|  | int | sgn_x,
|  | v32uint16 | b,
|  | int | sgn_y,
|  | int | sub_mul )

## ◆ negmul_4x2_2x8_conf() [7/8]

v32acc64 negmul_4x2_2x8_conf | ( | v16uint32 | a,
|  | v32int16 | b,
|  | int | sub_mul )

## ◆ negmul_4x2_2x8_conf() [8/8]

v32acc64 negmul_4x2_2x8_conf | ( | v16uint32 | a,
|  | v32uint16 | b,
|  | int | sub_mul )