Performance and Resource Utilization for AXI DataMover v5.1

Vivado Design Suite Release 2024.1

Interpreting the results

This page contains maximum frequency and resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Data is provided for the following device families:

Artix-7

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
c_m_axi_mm2s_data_width
c_m_axis_mm2s_tdata_width
c_m_axi_s2mm_data_width
c_s_axis_s2mm_tdata_width
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xc7a35t cpg236 1 Atrix_default_1 128 128 128 128 m_axi_mm2s_aclk=100 m_axis_mm2s_cmdsts_aclk=100 m_axis_s2mm_cmdsts_awclk=100 m_axi_s2mm_aclk 161 1595 2105 0 4 1 PRODUCTION 1.23 2018-06-13
xc7a35t cpg236 2 Atrix_default_2 128 128 128 128 m_axi_mm2s_aclk=100 m_axis_mm2s_cmdsts_aclk=100 m_axis_s2mm_cmdsts_awclk=100 m_axi_s2mm_aclk 205 1596 2105 0 4 1 PRODUCTION 1.23 2018-06-13
xc7a35t cpg236 3 Atrix_default_3 128 128 128 128 m_axi_mm2s_aclk=100 m_axis_mm2s_cmdsts_aclk=100 m_axis_s2mm_cmdsts_awclk=100 m_axi_s2mm_aclk 232 1596 2105 0 4 1 PRODUCTION 1.23 2018-06-13

Kintex-7

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
c_m_axi_mm2s_data_width
c_m_axis_mm2s_tdata_width
c_m_axi_s2mm_data_width
c_s_axis_s2mm_tdata_width
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xc7k325t ffg900 1 kintex_default_1 128 128 128 128 m_axi_mm2s_aclk=100 m_axis_mm2s_cmdsts_aclk=100 m_axis_s2mm_cmdsts_awclk=100 m_axi_s2mm_aclk 260 1602 2105 0 4 1 PRODUCTION 1.12 2017-02-17
xc7k325t ffg900 2 kintex_default_2 128 128 128 128 m_axi_mm2s_aclk=100 m_axis_mm2s_cmdsts_aclk=100 m_axis_s2mm_cmdsts_awclk=100 m_axi_s2mm_aclk 325 1623 2105 0 4 1 PRODUCTION 1.12 2017-02-17
xc7k325t ffg900 3 kintex_default_3 128 128 128 128 m_axi_mm2s_aclk=100 m_axis_mm2s_cmdsts_aclk=100 m_axis_s2mm_cmdsts_awclk=100 m_axi_s2mm_aclk 352 1623 2105 0 4 1 PRODUCTION 1.12 2017-02-17

Virtex-7

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
c_m_axi_mm2s_data_width
c_m_axis_mm2s_tdata_width
c_m_axi_s2mm_data_width
c_s_axis_s2mm_tdata_width
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xc7v585t ffg1157 1 vertex_default_1 128 128 128 128 m_axi_mm2s_aclk=100 m_axis_mm2s_cmdsts_aclk=100 m_axis_s2mm_cmdsts_awclk=100 m_axi_s2mm_aclk 254 1602 2105 0 4 1 PRODUCTION 1.12 2014-09-11
xc7v585t ffg1157 2 vertex_default_2 128 128 128 128 m_axi_mm2s_aclk=100 m_axis_mm2s_cmdsts_aclk=100 m_axis_s2mm_cmdsts_awclk=100 m_axi_s2mm_aclk 330 1623 2105 0 4 1 PRODUCTION 1.12 2014-09-11
xc7v585t ffg1157 3 vertex_default_3 128 128 128 128 m_axi_mm2s_aclk=100 m_axis_mm2s_cmdsts_aclk=100 m_axis_s2mm_cmdsts_awclk=100 m_axi_s2mm_aclk 341 1622 2105 0 4 1 PRODUCTION 1.12 2014-09-11

Virtex UltraScale

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
c_m_axi_mm2s_data_width
c_m_axis_mm2s_tdata_width
c_m_axi_s2mm_data_width
c_s_axis_s2mm_tdata_width
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcvu440 flgb2377 1 virtexus_2 128 128 128 128 m_axi_mm2s_aclk=100 m_axis_mm2s_cmdsts_aclk=100 m_axis_s2mm_cmdsts_awclk=100 m_axi_s2mm_aclk 314 1630 2104 0 4 1 PRODUCTION 1.26 12-04-2018
xcvu440 flgb2377 2 virtexus_3 128 128 128 128 m_axi_mm2s_aclk=100 m_axis_mm2s_cmdsts_aclk=100 m_axis_s2mm_cmdsts_awclk=100 m_axi_s2mm_aclk 347 1628 2104 0 4 1 PRODUCTION 1.26 12-04-2018

Virtex UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
c_m_axi_mm2s_data_width
c_m_axis_mm2s_tdata_width
c_m_axi_s2mm_data_width
c_s_axis_s2mm_tdata_width
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcvu13p fsga2577 3 virtexuplus_1 128 128 128 128 m_axi_mm2s_aclk=100 m_axis_mm2s_cmdsts_aclk=100 m_axis_s2mm_cmdsts_awclk=100 m_axi_s2mm_aclk 571 1662 2103 0 4 1 PRODUCTION 1.28 03-30-2022
xcvu13p fsga2577 2 virtexuplus_2 128 128 128 128 m_axi_mm2s_aclk=100 m_axis_mm2s_cmdsts_aclk=100 m_axis_s2mm_cmdsts_awclk=100 m_axi_s2mm_aclk 560 1646 2103 0 4 1 PRODUCTION 1.28 03-30-2022
xcvu13p fsga2577 1 virtexuplus_3 128 128 128 128 m_axi_mm2s_aclk=100 m_axis_mm2s_cmdsts_aclk=100 m_axis_s2mm_cmdsts_awclk=100 m_axi_s2mm_aclk 461 1635 2103 0 4 1 PRODUCTION 1.28 03-30-2022

Virtex UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
c_m_axi_mm2s_data_width
c_m_axis_mm2s_tdata_width
c_m_axi_s2mm_data_width
c_s_axis_s2mm_tdata_width
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcu50 fsvh2104 3 virtexuplusHBM_default 128 128 128 128 m_axi_mm2s_aclk=100 m_axis_mm2s_cmdsts_aclk=100 m_axis_s2mm_cmdsts_awclk=100 m_axi_s2mm_aclk 577 1660 2103 0 4 1 PRODUCTION 1.30 05-01-2022

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