Resource Utilization for Queue DMA Subsystem for PCI Express v5.0

Vivado Design Suite Release 2024.2

Interpreting the results

This page contains resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Data is provided for the following device families:

Versal ACAP

Part Information Configuration Parameters Resource Utilization
Device Package Speed Grade Configuration Name
functional_mode
device_port_type
pcie_blk_locn
pl_link_cap_max_link_width
pl_link_cap_max_link_speed
dsc_byp_mode
tl_pf_enable_reg
dma_intf_sel_qdma
master_cal_only
Fixed clocks (MHz) LUTs FFs DSPs Ultra RAMs 36k BRAMs 18k BRAMs Speedfile Status
xcvc1902 vsva2197 2MP xcvc1902-bep-g1x16 AXI_Bridge X16 2.5_GT/s 4 user_clk_sd=250 17221 20384 0 0 24 7 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-bep-g1x8 AXI_Bridge X8 2.5_GT/s 4 user_clk_sd=250 15260 17489 0 0 19 7 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-bep-g2x16 AXI_Bridge X16 5.0_GT/s 4 user_clk_sd=250 22297 26722 0 0 36 6 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-bep-g2x4 AXI_Bridge X4 5.0_GT/s 4 user_clk_sd=250 15260 17489 0 0 19 7 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-bep-g2x8 AXI_Bridge X8 5.0_GT/s 4 user_clk_sd=250 17226 20384 0 0 24 7 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-bep-g3x16 AXI_Bridge X16 8.0_GT/s 4 user_clk_sd=250 37233 40549 0 0 58 8 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-bep-g3x2 AXI_Bridge X2 8.0_GT/s 4 user_clk_sd=250 15292 17487 0 0 19 7 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-bep-g3x4 AXI_Bridge X4 8.0_GT/s 4 user_clk_sd=250 17224 20393 0 0 24 7 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-bep-g3x8 AXI_Bridge X8 8.0_GT/s 4 user_clk_sd=250 22284 26737 0 0 36 6 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-bep-g4x1 AXI_Bridge X1 16.0_GT/s 4 user_clk_sd=250 15260 17489 0 0 19 7 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-bep-g4x2 AXI_Bridge X2 16.0_GT/s 4 user_clk_sd=250 17221 20384 0 0 24 7 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-bep-g4x4 AXI_Bridge X4 16.0_GT/s 4 user_clk_sd=250 22290 26730 0 0 36 6 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-bep-g4x8 AXI_Bridge X8 16.0_GT/s 4 user_clk_sd=250 37229 40544 0 0 58 8 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-brp-g1x16 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X16 2.5_GT/s user_clk_sd=250 16674 18714 0 0 16 7 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-brp-g1x8 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X8 2.5_GT/s user_clk_sd=250 14282 15782 0 0 11 7 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-brp-g2x16 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X16 5.0_GT/s user_clk_sd=250 21998 24953 0 0 28 6 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-brp-g2x4 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X4 5.0_GT/s user_clk_sd=250 14273 15780 0 0 11 7 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-brp-g2x8 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X8 5.0_GT/s user_clk_sd=250 16681 18712 0 0 16 7 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 3HP xcvc1902-brp-g3x16 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X16 8.0_GT/s user_clk_sd=250 36966 39540 0 0 50 8 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-brp-g3x2 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X2 8.0_GT/s user_clk_sd=250 14278 15753 0 0 11 7 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-brp-g3x4 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X4 8.0_GT/s user_clk_sd=250 16684 18713 0 0 16 7 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-brp-g3x8 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X8 8.0_GT/s user_clk_sd=250 21981 24949 0 0 28 6 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-brp-g4x1 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1 16.0_GT/s user_clk_sd=250 14276 15787 0 0 11 7 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-brp-g4x2 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X2 16.0_GT/s user_clk_sd=250 16664 18714 0 0 16 7 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-brp-g4x4 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X4 16.0_GT/s user_clk_sd=250 21972 24950 0 0 28 6 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-brp-g4x8 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X8 16.0_GT/s user_clk_sd=250 37637 39567 0 0 50 8 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g1x16_mm X16 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 32595 37934 0 5 34 11 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g1x16_mm_st X16 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 53108 57485 0 10 39 16 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g1x16_st X16 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 45897 49442 0 10 28 13 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g1x8_mm X8 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 29809 34762 0 5 26 11 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g1x8_mm_st X8 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 49533 53864 0 10 30 16 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g1x8_st X8 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 42924 46407 0 10 23 13 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g2x16_mm X16 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 39977 45010 0 5 52 9 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g2x16_mm_st X16 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 62060 65468 0 10 59 14 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g2x16_st X16 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 52966 56184 0 10 40 12 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g2x4_mm X4 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 29809 34762 0 5 26 11 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g2x4_mm_st X4 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 49533 53864 0 10 30 16 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g2x4_st X4 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 42924 46407 0 10 23 13 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g2x8_mm X8 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 32595 37934 0 5 34 11 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g2x8_mm_st X8 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 53108 57485 0 10 39 16 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g2x8_st X8 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 45897 49442 0 10 28 13 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g3x16_mm X16 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 60551 61484 0 5 84 12 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g3x16_mm_st X16 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 85477 83237 0 10 95 17 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g3x16_st X16 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 73623 71431 0 10 62 14 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g3x2_mm X2 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 29809 34762 0 5 26 11 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g3x2_mm_st X2 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 49533 53864 0 10 30 16 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g3x2_st X2 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 42924 46407 0 10 23 13 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g3x4_mm X4 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 32595 37934 0 5 34 11 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g3x4_mm_st X4 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 53108 57485 0 10 39 16 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g3x4_st X4 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 45897 49442 0 10 28 13 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g3x8_mm X8 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 39977 45010 0 5 52 9 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g3x8_mm_st X8 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 62060 65468 0 10 59 14 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g3x8_st X8 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 52966 56184 0 10 40 12 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g4x1_mm X1 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 29809 34762 0 5 26 11 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g4x1_mm_st X1 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 49533 53864 0 10 30 16 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g4x1_st X1 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 42924 46407 0 10 23 13 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g4x2_mm X2 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 32595 37934 0 5 34 11 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g4x2_mm_st X2 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 53108 57485 0 10 39 16 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g4x2_st X2 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 45897 49442 0 10 28 13 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g4x4_mm X4 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 39977 45010 0 5 52 9 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g4x4_mm_st X4 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 62060 65468 0 10 59 14 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g4x4_st X4 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 52966 56184 0 10 40 12 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g4x8_mm X8 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 60551 61484 0 5 84 12 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g4x8_mm_st X8 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 85477 83237 0 10 95 17 PRODUCTION 2.13 2024-03-28
xcvc1902 vsva2197 2MP xcvc1902-dma-g4x8_st X8 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 73623 71431 0 10 62 14 PRODUCTION 2.13 2024-03-28
xcvp1202 vsva2785 2MP xcvp1202-bep-g1x1 AXI_Bridge X1Y0 X1 2.5_GT/s 4 user_clk_sd=250 15605 16692 0 0 19 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g1x2 AXI_Bridge X1Y0 X2 2.5_GT/s 4 user_clk_sd=250 15605 16692 0 0 19 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g1x4 AXI_Bridge X1Y0 X4 2.5_GT/s 4 user_clk_sd=250 15605 16692 0 0 19 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g1x8 AXI_Bridge X1Y0 X8 2.5_GT/s 4 user_clk_sd=250 15605 16692 0 0 19 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g2x1 AXI_Bridge X1Y0 X1 5.0_GT/s 4 user_clk_sd=250 15613 16692 0 0 19 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g2x2 AXI_Bridge X1Y0 X2 5.0_GT/s 4 user_clk_sd=250 15613 16692 0 0 19 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g2x4 AXI_Bridge X1Y0 X4 5.0_GT/s 4 user_clk_sd=250 15613 16692 0 0 19 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g2x8 AXI_Bridge X1Y0 X8 5.0_GT/s 4 user_clk_sd=250 17559 19596 0 0 24 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g3x1 AXI_Bridge X1Y0 X1 8.0_GT/s 4 user_clk_sd=250 15623 16698 0 0 19 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g3x2 AXI_Bridge X1Y0 X2 8.0_GT/s 4 user_clk_sd=250 15623 16698 0 0 19 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g3x4 AXI_Bridge X1Y0 X4 8.0_GT/s 4 user_clk_sd=250 17574 19597 0 0 24 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g3x8 AXI_Bridge X1Y0 X8 8.0_GT/s 4 user_clk_sd=250 22622 25940 0 0 36 6 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g4x1 AXI_Bridge X1Y0 X1 16.0_GT/s 4 user_clk_sd=250 15647 16684 0 0 19 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g4x2 AXI_Bridge X1Y0 X2 16.0_GT/s 4 user_clk_sd=250 17559 19596 0 0 24 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g4x4 AXI_Bridge X1Y0 X4 16.0_GT/s 4 user_clk_sd=250 22608 25942 0 0 36 6 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g4x8 AXI_Bridge X1Y0 X8 16.0_GT/s 4 user_clk_sd=250 37603 39750 0 0 58 8 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g5x1 AXI_Bridge X1Y0 X1 32.0_GT/s 4 user_clk_sd=250 17559 19596 0 0 24 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g5x2 AXI_Bridge X1Y0 X2 32.0_GT/s 4 user_clk_sd=250 22608 25942 0 0 36 6 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-bep-g5x4 AXI_Bridge X1Y0 X4 32.0_GT/s 4 user_clk_sd=250 37603 39750 0 0 58 8 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g1x1 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X1 2.5_GT/s user_clk_sd=250 14288 15783 0 0 11 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g1x2 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X2 2.5_GT/s user_clk_sd=250 14288 15783 0 0 11 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g1x4 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X4 2.5_GT/s user_clk_sd=250 14288 15783 0 0 11 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g1x8 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X8 2.5_GT/s user_clk_sd=250 14288 15783 0 0 11 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g2x1 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X1 5.0_GT/s user_clk_sd=250 14274 15780 0 0 11 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g2x2 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X2 5.0_GT/s user_clk_sd=250 14274 15780 0 0 11 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g2x4 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X4 5.0_GT/s user_clk_sd=250 14274 15780 0 0 11 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g2x8 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X8 5.0_GT/s user_clk_sd=250 16663 18720 0 0 16 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g3x1 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X1 8.0_GT/s user_clk_sd=250 14267 15783 0 0 11 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g3x2 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X2 8.0_GT/s user_clk_sd=250 14267 15783 0 0 11 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g3x4 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X4 8.0_GT/s user_clk_sd=250 16676 18725 0 0 16 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g3x8 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X8 8.0_GT/s user_clk_sd=250 21984 24952 0 0 28 6 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g4x1 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X1 16.0_GT/s user_clk_sd=250 14280 15789 0 0 11 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g4x2 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X2 16.0_GT/s user_clk_sd=250 16659 18718 0 0 16 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g4x4 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X4 16.0_GT/s user_clk_sd=250 21984 24952 0 0 28 6 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g4x8 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X8 16.0_GT/s user_clk_sd=250 37708 39561 0 0 50 8 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g5x1 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X1 32.0_GT/s user_clk_sd=250 16666 18710 0 0 16 7 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g5x2 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X2 32.0_GT/s user_clk_sd=250 21965 24948 0 0 28 6 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-brp-g5x4 AXI_Bridge Root_Port_of_PCI_Express_Root_Complex X1Y0 X4 32.0_GT/s user_clk_sd=250 37663 39562 0 0 50 8 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g1x1_mm X1Y0 X1 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 30011 33211 0 5 26 11 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g1x1_mm_st X1Y0 X1 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 49771 52292 0 10 30 16 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g1x1_st X1Y0 X1 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 43196 44860 0 10 23 13 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g1x2_mm X1Y0 X2 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 30011 33211 0 5 26 11 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g1x2_mm_st X1Y0 X2 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 49771 52292 0 10 30 16 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g1x2_st X1Y0 X2 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 43196 44860 0 10 23 13 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g1x4_mm X1Y0 X4 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 30011 33211 0 5 26 11 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g1x4_mm_st X1Y0 X4 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 49771 52292 0 10 30 16 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g1x4_st X1Y0 X4 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 43196 44860 0 10 23 13 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g1x8_mm X1Y0 X8 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 30011 33211 0 5 26 11 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g1x8_mm_st X1Y0 X8 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 49771 52292 0 10 30 16 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g1x8_st X1Y0 X8 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 43196 44860 0 10 23 13 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g2x1_mm X1Y0 X1 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 30011 33211 0 5 26 11 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g2x1_mm_st X1Y0 X1 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 49771 52292 0 10 30 16 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g2x1_st X1Y0 X1 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 43196 44860 0 10 23 13 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g2x2_mm X1Y0 X2 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 30011 33211 0 5 26 11 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g2x2_mm_st X1Y0 X2 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 49771 52292 0 10 30 16 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g2x2_st X1Y0 X2 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 43196 44860 0 10 23 13 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g2x4_mm X1Y0 X4 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 30011 33211 0 5 26 11 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g2x4_mm_st X1Y0 X4 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 49771 52292 0 10 30 16 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g2x4_st X1Y0 X4 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 43196 44860 0 10 23 13 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g2x8_mm X1Y0 X8 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 32819 36391 0 5 34 11 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g2x8_mm_st X1Y0 X8 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 53357 55954 0 10 39 16 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g2x8_st X1Y0 X8 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 46144 47887 0 10 28 13 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g3x1_mm X1Y0 X1 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 30011 33211 0 5 26 11 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g3x1_mm_st X1Y0 X1 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 49771 52292 0 10 30 16 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g3x1_st X1Y0 X1 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 43196 44860 0 10 23 13 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g3x2_mm X1Y0 X2 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 30011 33211 0 5 26 11 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g3x2_mm_st X1Y0 X2 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 49771 52292 0 10 30 16 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g3x2_st X1Y0 X2 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 43196 44860 0 10 23 13 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g3x4_mm X1Y0 X4 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 32819 36391 0 5 34 11 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g3x4_mm_st X1Y0 X4 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 53357 55954 0 10 39 16 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g3x4_st X1Y0 X4 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 46144 47887 0 10 28 13 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g3x8_mm X1Y0 X8 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 40222 43456 0 5 52 9 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g3x8_mm_st X1Y0 X8 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 62577 63953 0 10 59 14 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g3x8_st X1Y0 X8 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 53512 54641 0 10 40 12 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g4x1_mm X1Y0 X1 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 30011 33211 0 5 26 11 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g4x1_mm_st X1Y0 X1 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 49771 52292 0 10 30 16 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g4x1_st X1Y0 X1 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 43196 44860 0 10 23 13 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g4x2_mm X1Y0 X2 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 32819 36391 0 5 34 11 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g4x2_mm_st X1Y0 X2 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 53357 55954 0 10 39 16 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g4x2_st X1Y0 X2 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 46144 47887 0 10 28 13 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g4x4_mm X1Y0 X4 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 40222 43456 0 5 52 9 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g4x4_mm_st X1Y0 X4 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 62577 63953 0 10 59 14 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g4x4_st X1Y0 X4 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 53512 54641 0 10 40 12 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g4x8_mm X1Y0 X8 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 60793 59929 0 5 84 12 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g4x8_mm_st X1Y0 X8 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 86317 82168 0 10 95 17 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g4x8_st X1Y0 X8 16.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 74219 70064 0 10 62 14 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g5x1_mm X1Y0 X1 32.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 32819 36391 0 5 34 11 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g5x1_mm_st X1Y0 X1 32.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 53357 55954 0 10 39 16 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g5x1_st X1Y0 X1 32.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 46144 47887 0 10 28 13 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g5x2_mm X1Y0 X2 32.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 40222 43456 0 5 52 9 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g5x2_mm_st X1Y0 X2 32.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 62577 63953 0 10 59 14 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g5x2_st X1Y0 X2 32.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 53512 54641 0 10 40 12 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g5x4_mm X1Y0 X4 32.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM user_clk_sd=250 60793 59929 0 5 84 12 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g5x4_mm_st X1Y0 X4 32.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion user_clk_sd=250 86317 82168 0 10 95 17 PRODUCTION 2.07 2024-04-02
xcvp1202 vsva2785 2MP xcvp1202-dma-g5x4_st X1Y0 X4 32.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion user_clk_sd=250 74219 70064 0 10 62 14 PRODUCTION 2.07 2024-04-02

Virtex UltraScale+

Part Information Configuration Parameters Resource Utilization
Device Package Speed Grade Configuration Name
functional_mode
device_port_type
pcie_blk_locn
pl_link_cap_max_link_width
pl_link_cap_max_link_speed
dsc_byp_mode
tl_pf_enable_reg
dma_intf_sel_qdma
master_cal_only
Fixed clocks (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Ultra RAMs Speedfile Status
xcvu13p fsga2577 3 xcvu13p-dma-g1x16_mm X16 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM false DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[10].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[11].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[12].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[13].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[14].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[15].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[1].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[2].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[3].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[4].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[5].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[6].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[7].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[8].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[9].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 34560 44938 0 56 11 5 PRODUCTION 1.28 03-30-2022
xcvu13p fsga2577 3 xcvu13p-dma-g1x16_mm_st X16 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion false DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[10].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[11].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[12].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[13].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[14].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[15].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[1].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[2].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[3].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[4].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[5].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[6].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[7].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[8].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[9].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 53652 64563 0 61 16 10 PRODUCTION 1.28 03-30-2022
xcvu13p fsga2577 3 xcvu13p-dma-g1x16_st X16 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion false DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[10].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[11].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[12].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[13].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[14].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[15].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[1].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[2].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[3].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[4].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[5].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[6].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[7].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[8].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[9].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 46752 56425 0 50 13 10 PRODUCTION 1.28 03-30-2022
xcvu13p fsga2577 3 xcvu13p-dma-g1x8_mm X8 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM false DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[1].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[2].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[3].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[4].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[5].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[6].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[7].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 29829 36927 0 48 11 5 PRODUCTION 1.28 03-30-2022
xcvu13p fsga2577 3 xcvu13p-dma-g1x8_mm_st X8 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion false DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[1].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[2].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[3].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[4].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[5].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[6].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[7].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 48431 56022 0 52 16 10 PRODUCTION 1.28 03-30-2022
xcvu13p fsga2577 3 xcvu13p-dma-g1x8_st X8 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion false DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[1].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[2].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[3].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[4].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[5].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[6].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[7].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 42379 48573 0 45 13 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g1x1_mm X1 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM false DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 27634 31952 0 48 11 5 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g1x1_mm_st X1 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion false DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 46245 51048 0 52 16 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g1x1_st X1 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 40204 43597 0 45 13 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g1x2_mm X2 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM false DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[1].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 27968 32665 0 48 11 5 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g1x2_mm_st X2 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion false DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[1].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 46577 51761 0 52 16 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g1x2_st X2 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion false DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[1].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 40516 44310 0 45 13 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g1x4_mm X4 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[1].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[2].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[3].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=125 sys_clk=100 sys_clk_gt=100 28600 34212 0 48 11 5 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g1x4_mm_st X4 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[1].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[2].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[3].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=125 sys_clk=100 sys_clk_gt=100 47203 53310 0 52 16 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g1x4_st X4 2.5_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[1].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[2].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[3].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=125 sys_clk=100 sys_clk_gt=100 41158 45860 0 45 13 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g2x16_mm X16 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[15].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 39231 44022 0 74 9 5 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g2x16_mm_st X16 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[15].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 59814 64716 0 81 14 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g2x16_st X16 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[15].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 51023 55183 0 62 12 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g2x4_mm X4 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[3].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 27966 32906 0 48 11 5 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g2x4_mm_st X4 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[3].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 46559 52002 0 52 16 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g2x4_st X4 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[3].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 40513 44552 0 45 13 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g2x8_mm X8 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[7].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 30654 36484 0 56 11 5 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g2x8_mm_st X8 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[7].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 49774 56108 0 61 16 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g2x8_st X8 5.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[7].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 42868 47971 0 50 13 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g3x16_mm X16 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[15].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 63086 68376 0 106 12 5 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g3x16_mm_st X16 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[15].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 86999 90315 0 117 17 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g3x16_st X16 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[15].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 75849 77978 0 84 14 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g3x1_mm X1 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=125 sys_clk=100 sys_clk_gt=100 27622 32112 0 48 11 5 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g3x1_mm_st X1 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=125 sys_clk=100 sys_clk_gt=100 46220 51211 0 52 16 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g3x1_st X1 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[0].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=125 sys_clk=100 sys_clk_gt=100 40184 43761 0 45 13 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g3x2_mm X2 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[1].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 27728 32332 0 48 11 5 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g3x2_mm_st X2 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[1].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 46323 51428 0 52 16 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g3x2_st X2 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[1].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 40274 43977 0 45 13 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g3x4_mm X4 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[3].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 30221 35331 0 56 11 5 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g3x4_mm_st X4 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[3].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 49252 54957 0 61 16 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g3x4_st X4 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[3].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 42352 46818 0 50 13 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g3x8_mm X8 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[7].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 38516 41838 0 74 9 5 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g3x8_mm_st X8 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_MM_and_AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[7].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 58995 62541 0 81 14 10 PRODUCTION 1.28 03-30-2022
xcvu9p flgb2104 3 xcvu9p-dma-g3x8_st X8 8.0_GT/s Descriptor_bypass_and_internal 4 AXI_Stream_with_Completion DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/gt_wizard.gtwizard_top_i/my_ip_pcie4_ip_gt_i/inst/gen_gtwizard_gtye4_top.my_ip_pcie4_ip_gt_gtwizard_gtye4_inst/gen_gtwizard_gtye4.gen_cpll_cal_gtye4.gen_cpll_cal_inst[7].gen_inst_cpll_cal.gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_inst/gtwizard_ultrascale_v1_7_19_gtye4_cpll_cal_tx_i/bufg_gt_txoutclkmon_inst/O=125 DUT/inst/pcie4_ip_i/inst/my_ip_pcie4_ip_gt_top_i/diablo_gt.diablo_gt_phy_wrapper/phy_clk_i/bufg_gt_intclk/O=1 axi_aclk=250 sys_clk=100 sys_clk_gt=100 50193 53008 0 62 12 10 PRODUCTION 1.28 03-30-2022

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