Resource Utilization for QSGMII v4.0

Vivado Design Suite Release 2026.1

Interpreting the results

This page contains resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

The IP core's example design is opened in Vivado Design Suite, and synthesis and implementation are run. Resource figures are taken from the utilization report issued at the end of implementation, and are for the IP instance only, excluding other parts of the example design.
LUT figures do not include LUTs used as pack-thrus, but do include LUTs used as memory.
Default Vivado Design Suite 2026.1 settings were used. You may be able to improve on these figures using different settings. Because surrounding circuitry will affect placement and timing, no guarantee can be given that these figures will be repeatable in a larger design.

Data is provided for the following device families:

Artix-7
Kintex-7
Kintex UltraScale
Kintex UltraScale+
Virtex-7
Virtex UltraScale
Zynq-7000
Zynq UltraScale+

Artix-7

Part Information			Configuration Parameters									Resource Utilization
Device	Package	Speed Grade	Configuration Name	Mode	Management_Interface	Config_Interface	Auto_Negotiation	AN_Config_Interface	GMII_or_MII_Mode	SupportLevel	TransceiverControl	LUTs	FFs	DSPs	36k BRAMs	18k BRAMs	BUFGCTRL	BUFG	BUFR	MMCME2_ADV	Speedfile Status
xc7a200t	ffg1156	2	a_a7_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2377	4206	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	a_a7_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2351	4180	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	a_a7_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2038	3784	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	a_a7_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2362	4198	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	a_a7_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2342	4172	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	a_a7_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2017	3760	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	a_a7_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1863	3490	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	a_a7_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1852	3464	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	a_a7_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1633	3144	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	aa_a7_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2363	4184	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	aa_a7_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2334	4158	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	aa_a7_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2019	3762	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	aa_a7_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2346	4176	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	aa_a7_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2326	4150	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	aa_a7_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1999	3738	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	aa_a7_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1848	3468	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	aa_a7_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1836	3442	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	aa_a7_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1616	3122	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	b_a7_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2414	4518	0	0	0	5	5	6	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	b_a7_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2408	4492	0	0	0	5	5	6	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	b_a7_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2051	4024	0	0	0	5	5	6	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	b_a7_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2389	4502	0	0	0	5	5	6	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	b_a7_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2371	4476	0	0	0	5	5	6	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	b_a7_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2022	3956	0	0	0	5	5	6	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	b_a7_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1888	3710	0	0	0	5	5	6	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	b_a7_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1878	3684	0	0	0	5	5	6	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	b_a7_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1657	3408	0	0	0	5	5	6	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ba_a7_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2395	4476	0	0	0	1	1	4	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ba_a7_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2388	4450	0	0	0	1	1	4	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ba_a7_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2030	3982	0	0	0	1	1	4	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ba_a7_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2372	4460	0	0	0	1	1	4	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ba_a7_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2353	4434	0	0	0	1	1	4	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ba_a7_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2005	3914	0	0	0	1	1	4	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ba_a7_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1868	3668	0	0	0	1	1	4	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ba_a7_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1858	3642	0	0	0	1	1	4	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ba_a7_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1638	3366	0	0	0	1	1	4	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	c_a7_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Core	false	2493	4372	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	c_a7_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Core	false	2490	4346	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	c_a7_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Core	false	2132	3890	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	c_a7_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Core	false	2473	4356	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	c_a7_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Core	false	2455	4330	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	c_a7_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Core	false	2104	3822	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	c_a7_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Core	false	1968	3576	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	c_a7_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Core	false	1955	3550	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	c_a7_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Core	false	1736	3262	0	0	0	5	5	2	1	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ca_a7_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2477	4330	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ca_a7_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2469	4304	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ca_a7_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2113	3848	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ca_a7_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2452	4314	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ca_a7_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2430	4288	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ca_a7_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2086	3780	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ca_a7_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1948	3534	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ca_a7_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1935	3508	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13
xc7a200t	ffg1156	2	ca_a7_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1715	3220	0	0	0	1	1	0	0	PRODUCTION 1.23 2018-06-13

Kintex-7

Part Information			Configuration Parameters									Resource Utilization
Device	Package	Speed Grade	Configuration Name	Mode	Management_Interface	Config_Interface	Auto_Negotiation	AN_Config_Interface	GMII_or_MII_Mode	SupportLevel	TransceiverControl	LUTs	FFs	DSPs	36k BRAMs	18k BRAMs	BUFGCTRL	BUFG	BUFR	MMCME2_ADV	Speedfile Status
xc7k325t	ffg900	2	d_k7_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2333	4087	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	d_k7_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2306	4061	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	d_k7_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	1993	3665	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	d_k7_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2319	4079	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	d_k7_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2297	4053	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	d_k7_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1970	3641	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	d_k7_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1820	3371	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	d_k7_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1808	3345	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	d_k7_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1589	3025	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	da_k7_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2340	4077	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	da_k7_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2311	4051	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	da_k7_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	1999	3655	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	da_k7_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2325	4069	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	da_k7_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2305	4043	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	da_k7_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1978	3631	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	da_k7_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1827	3361	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	da_k7_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1816	3335	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	da_k7_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1596	3015	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	e_k7_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2368	4399	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	e_k7_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2363	4373	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	e_k7_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2005	3905	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	e_k7_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2343	4383	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	e_k7_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2326	4357	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	e_k7_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1976	3837	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	e_k7_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1842	3591	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	e_k7_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1830	3565	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	e_k7_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1610	3289	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	ea_k7_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2371	4369	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	ea_k7_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2369	4343	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	ea_k7_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2011	3875	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	ea_k7_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2350	4353	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	ea_k7_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2331	4327	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	ea_k7_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1984	3807	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	ea_k7_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1848	3561	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	ea_k7_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1835	3535	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	ea_k7_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1615	3259	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	f_k7_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Core	false	2451	4253	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	f_k7_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Core	false	2447	4227	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	f_k7_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Core	false	2087	3771	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	f_k7_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Core	false	2426	4237	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	f_k7_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Core	false	2407	4211	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	f_k7_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Core	false	2060	3703	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	f_k7_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Core	false	1923	3457	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	f_k7_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Core	false	1910	3431	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	f_k7_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Core	false	1692	3143	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	fa_k7_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2454	4223	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	fa_k7_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2450	4197	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	fa_k7_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2093	3741	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	fa_k7_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2432	4207	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	fa_k7_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2410	4181	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	fa_k7_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2063	3673	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	fa_k7_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1926	3427	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	fa_k7_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1915	3401	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	2	fa_k7_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1697	3113	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17

Kintex UltraScale

Part Information			Configuration Parameters									Resource Utilization
Device	Package	Speed Grade	Configuration Name	Mode	Management_Interface	Config_Interface	Auto_Negotiation	AN_Config_Interface	GMII_or_MII_Mode	SupportLevel	TransceiverControl	LUTs	FFs	DSPs	36k BRAMs	18k BRAMs	BUFGCE	BUFGCE_DIV	BUFG_GT	MMCME3_ADV	Speedfile Status
xcku115	flva1517	3	m_ku_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2156	3932	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	m_ku_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2145	3924	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	m_ku_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	1843	3528	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	m_ku_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2152	3924	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	m_ku_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2147	3916	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	m_ku_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1826	3504	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	m_ku_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1672	3216	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	m_ku_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1662	3208	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	m_ku_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1442	2888	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	ma_ku_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2156	3922	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	ma_ku_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2145	3914	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	ma_ku_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	1843	3518	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	ma_ku_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2152	3914	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	ma_ku_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2147	3906	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	ma_ku_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1826	3494	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	ma_ku_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1672	3206	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	ma_ku_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1662	3198	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	ma_ku_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1442	2878	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	n_ku_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2235	4320	0	0	0	9	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	n_ku_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2202	4312	0	0	0	9	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	n_ku_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	1876	3848	0	0	0	9	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	n_ku_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2195	4304	0	0	0	9	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	n_ku_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2223	4296	0	0	0	9	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	n_ku_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1849	3780	0	0	0	9	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	n_ku_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1699	3556	0	0	0	9	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	n_ku_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1688	3508	0	0	0	9	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	n_ku_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1465	3188	0	0	0	9	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	na_ku_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2226	4290	0	0	0	8	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	na_ku_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2193	4282	0	0	0	8	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	na_ku_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	1868	3818	0	0	0	8	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	na_ku_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2184	4274	0	0	0	8	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	na_ku_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2214	4266	0	0	0	8	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	na_ku_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1839	3750	0	0	0	8	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	na_ku_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1688	3526	0	0	0	8	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	na_ku_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1677	3478	0	0	0	8	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	na_ku_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1456	3158	0	0	0	8	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	o_ku_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Core	false	2314	4114	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	o_ku_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Core	false	2285	4106	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	o_ku_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Core	false	1953	3658	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	o_ku_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Core	false	2276	4098	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	o_ku_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Core	false	2305	4090	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	o_ku_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Core	false	1929	3590	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	o_ku_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Core	false	1778	3350	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	o_ku_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Core	false	1761	3318	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	o_ku_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Core	false	1547	2998	0	0	0	1	1	2	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	oa_ku_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2306	4084	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	oa_ku_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2277	4076	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	oa_ku_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	1945	3628	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	oa_ku_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2265	4068	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	oa_ku_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2298	4060	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	oa_ku_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	1918	3560	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	oa_ku_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1771	3320	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	oa_ku_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1751	3288	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018
xcku115	flva1517	3	oa_ku_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1539	2968	0	0	0	0	0	0	0	PRODUCTION 1.26 12-04-2018

Kintex UltraScale+

Part Information			Configuration Parameters									Resource Utilization
Device	Package	Speed Grade	Configuration Name	Mode	Management_Interface	Config_Interface	Auto_Negotiation	AN_Config_Interface	GMII_or_MII_Mode	SupportLevel	TransceiverControl	LUTs	FFs	DSPs	36k BRAMs	18k BRAMs	BUFGCE	BUFGCE_DIV	BUFG_GT	Speedfile Status
xcku11p	ffve1517	1	s_kup_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2340	4361	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	s_kup_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2323	4353	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	s_kup_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2022	3957	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	s_kup_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2337	4353	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	s_kup_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2327	4345	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	s_kup_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2003	3933	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	s_kup_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1852	3645	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	s_kup_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1844	3637	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	s_kup_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1625	3317	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	sa_kup_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2340	4351	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	sa_kup_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2323	4343	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	sa_kup_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2022	3947	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	sa_kup_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2337	4343	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	sa_kup_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2327	4335	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	sa_kup_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2003	3923	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	sa_kup_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1852	3635	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	sa_kup_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1844	3627	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	sa_kup_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1625	3307	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	t_kup_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2409	4749	0	0	0	10	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	t_kup_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2386	4741	0	0	0	10	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	t_kup_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2058	4277	0	0	0	10	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	t_kup_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2376	4733	0	0	0	10	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	t_kup_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2408	4725	0	0	0	10	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	t_kup_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2030	4209	0	0	0	10	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	t_kup_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1878	3985	0	0	0	10	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	t_kup_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1870	3937	0	0	0	10	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	t_kup_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1649	3617	0	0	0	10	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ta_kup_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2401	4719	0	0	0	9	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ta_kup_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2378	4711	0	0	0	9	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ta_kup_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2050	4247	0	0	0	9	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ta_kup_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2368	4703	0	0	0	9	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ta_kup_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2397	4695	0	0	0	9	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ta_kup_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2022	4179	0	0	0	9	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ta_kup_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1870	3955	0	0	0	9	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ta_kup_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1859	3907	0	0	0	9	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ta_kup_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1641	3587	0	0	0	9	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	u_kup_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Core	false	2494	4543	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	u_kup_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Core	false	2466	4535	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	u_kup_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Core	false	2141	4087	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	u_kup_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Core	false	2455	4527	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	u_kup_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Core	false	2489	4519	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	u_kup_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Core	false	2114	4019	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	u_kup_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Core	false	1959	3779	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	u_kup_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Core	false	1951	3747	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	u_kup_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Core	false	1727	3427	0	0	0	2	1	3	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ua_kup_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2486	4513	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ua_kup_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2458	4505	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ua_kup_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2133	4057	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ua_kup_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2447	4497	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ua_kup_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2481	4489	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ua_kup_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2106	3989	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ua_kup_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1951	3749	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ua_kup_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1943	3717	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022
xcku11p	ffve1517	1	ua_kup_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1719	3397	0	0	0	1	0	1	PRODUCTION 1.29 05-01-2022

Virtex-7

Part Information			Configuration Parameters									Resource Utilization
Device	Package	Speed Grade	Configuration Name	Mode	Management_Interface	Config_Interface	Auto_Negotiation	AN_Config_Interface	GMII_or_MII_Mode	SupportLevel	TransceiverControl	LUTs	FFs	DSPs	36k BRAMs	18k BRAMs	BUFGCTRL	BUFG	BUFR	MMCME2_ADV	Speedfile Status
xc7vx330t	ffg1157	2	g_v7_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2346	4088	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	g_v7_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2317	4062	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	g_v7_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2002	3666	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	g_v7_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2328	4080	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	g_v7_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2308	4054	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	g_v7_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1984	3642	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	g_v7_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1830	3372	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	g_v7_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1820	3346	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	g_v7_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1600	3026	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ga_v7_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2345	4078	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ga_v7_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2316	4052	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ga_v7_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2002	3656	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ga_v7_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2330	4070	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ga_v7_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2310	4044	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ga_v7_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1983	3632	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ga_v7_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1831	3362	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ga_v7_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1819	3336	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ga_v7_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1599	3016	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	h_v7_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2377	4400	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	h_v7_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2371	4374	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	h_v7_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2012	3906	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	h_v7_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2355	4384	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	h_v7_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2333	4358	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	h_v7_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1989	3838	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	h_v7_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1850	3592	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	h_v7_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1836	3566	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	h_v7_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1618	3290	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ha_v7_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2377	4370	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ha_v7_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2374	4344	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ha_v7_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2015	3876	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ha_v7_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2355	4354	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ha_v7_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2334	4328	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ha_v7_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1988	3808	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ha_v7_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1850	3562	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ha_v7_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1839	3536	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ha_v7_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1621	3260	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	i_v7_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Core	false	2460	4254	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	i_v7_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Core	false	2460	4228	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	i_v7_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Core	false	2098	3772	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	i_v7_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Core	false	2439	4238	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	i_v7_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Core	false	2418	4212	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	i_v7_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Core	false	2069	3704	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	i_v7_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Core	false	1936	3458	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	i_v7_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Core	false	1924	3432	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	i_v7_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Core	false	1703	3144	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ia_v7_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2459	4224	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ia_v7_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2456	4198	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ia_v7_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2095	3742	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ia_v7_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2436	4208	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ia_v7_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2416	4182	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ia_v7_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2068	3674	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ia_v7_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1932	3428	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ia_v7_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1919	3402	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	2	ia_v7_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1699	3114	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11

Virtex UltraScale

Part Information			Configuration Parameters									Resource Utilization
Device	Package	Speed Grade	Configuration Name	Mode	Management_Interface	Config_Interface	Auto_Negotiation	AN_Config_Interface	GMII_or_MII_Mode	SupportLevel	TransceiverControl	LUTs	FFs	DSPs	36k BRAMs	18k BRAMs	BUFGCE	BUFGCE_DIV	BUFG_GT	MMCME3_ADV	Speedfile Status
xcvu160	flgb2104	3	p_vu_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2160	3932	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	p_vu_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2142	3924	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	p_vu_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	1848	3528	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	p_vu_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2156	3924	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	p_vu_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2146	3916	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	p_vu_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1824	3504	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	p_vu_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1669	3216	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	p_vu_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1662	3208	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	p_vu_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1444	2888	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	pa_vu_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2160	3922	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	pa_vu_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2142	3914	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	pa_vu_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	1848	3518	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	pa_vu_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2156	3914	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	pa_vu_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2146	3906	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	pa_vu_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1824	3494	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	pa_vu_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1669	3206	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	pa_vu_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1662	3198	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	pa_vu_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1444	2878	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	q_vu_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2227	4320	0	0	0	9	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	q_vu_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2206	4312	0	0	0	9	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	q_vu_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	1877	3848	0	0	0	9	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	q_vu_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2190	4304	0	0	0	9	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	q_vu_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2221	4296	0	0	0	9	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	q_vu_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1850	3780	0	0	0	9	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	q_vu_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1697	3556	0	0	0	9	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	q_vu_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1683	3508	0	0	0	9	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	q_vu_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1466	3188	0	0	0	9	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	qa_vu_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2217	4290	0	0	0	8	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	qa_vu_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2196	4282	0	0	0	8	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	qa_vu_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	1865	3818	0	0	0	8	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	qa_vu_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2181	4274	0	0	0	8	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	qa_vu_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2212	4266	0	0	0	8	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	qa_vu_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1840	3750	0	0	0	8	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	qa_vu_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1688	3526	0	0	0	8	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	qa_vu_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1675	3478	0	0	0	8	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	qa_vu_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1458	3158	0	0	0	8	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	r_vu_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Core	false	2306	4114	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	r_vu_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Core	false	2287	4106	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	r_vu_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Core	false	1956	3658	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	r_vu_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Core	false	2274	4098	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	r_vu_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Core	false	2305	4090	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	r_vu_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Core	false	1923	3590	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	r_vu_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Core	false	1781	3350	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	r_vu_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Core	false	1766	3318	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	r_vu_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Core	false	1542	2998	0	0	0	1	1	2	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	ra_vu_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2296	4084	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	ra_vu_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2279	4076	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	ra_vu_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	1949	3628	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	ra_vu_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2265	4068	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	ra_vu_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2298	4060	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	ra_vu_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	1915	3560	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	ra_vu_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1769	3320	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	ra_vu_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1758	3288	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018
xcvu160	flgb2104	3	ra_vu_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1534	2968	0	0	0	0	0	0	0	PRODUCTION 1.27 12-04-2018

Zynq-7000

Part Information			Configuration Parameters									Resource Utilization
Device	Package	Speed Grade	Configuration Name	Mode	Management_Interface	Config_Interface	Auto_Negotiation	AN_Config_Interface	GMII_or_MII_Mode	SupportLevel	TransceiverControl	LUTs	FFs	DSPs	36k BRAMs	18k BRAMs	BUFGCTRL	BUFG	BUFR	MMCME2_ADV	Speedfile Status
xc7z100	ffg1156	2	j_z7_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2333	4087	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	j_z7_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2305	4061	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	j_z7_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	1993	3665	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	j_z7_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2317	4079	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	j_z7_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2298	4053	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	j_z7_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1970	3641	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	j_z7_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1820	3371	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	j_z7_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1808	3345	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	j_z7_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1589	3025	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ja_z7_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2341	4077	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ja_z7_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2312	4051	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ja_z7_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2000	3655	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ja_z7_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2324	4069	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ja_z7_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2304	4043	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ja_z7_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1978	3631	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ja_z7_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1828	3361	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ja_z7_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1817	3335	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ja_z7_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1595	3015	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	k_z7_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2366	4399	0	0	0	4	4	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	k_z7_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2358	4373	0	0	0	4	4	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	k_z7_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2000	3905	0	0	0	4	4	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	k_z7_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2342	4383	0	0	0	4	4	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	k_z7_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2322	4357	0	0	0	4	4	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	k_z7_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1973	3837	0	0	0	4	4	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	k_z7_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1839	3591	0	0	0	4	4	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	k_z7_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1827	3565	0	0	0	4	4	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	k_z7_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1608	3289	0	0	0	4	4	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ka_z7_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2374	4369	0	0	0	1	1	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ka_z7_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2371	4343	0	0	0	1	1	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ka_z7_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2008	3875	0	0	0	1	1	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ka_z7_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2352	4353	0	0	0	1	1	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ka_z7_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2330	4327	0	0	0	1	1	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ka_z7_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1982	3807	0	0	0	1	1	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ka_z7_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1849	3561	0	0	0	1	1	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ka_z7_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1837	3535	0	0	0	1	1	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	ka_z7_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1617	3259	0	0	0	1	1	4	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	l_z7_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Core	false	2452	4253	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	l_z7_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Core	false	2445	4227	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	l_z7_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Core	false	2088	3771	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	l_z7_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Core	false	2429	4237	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	l_z7_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Core	false	2405	4211	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	l_z7_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Core	false	2059	3703	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	l_z7_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Core	false	1923	3457	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	l_z7_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Core	false	1910	3431	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	l_z7_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Core	false	1693	3143	0	0	0	4	4	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	la_z7_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2453	4223	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	la_z7_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2449	4197	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	la_z7_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2091	3741	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	la_z7_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2432	4207	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	la_z7_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2411	4181	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	la_z7_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2064	3673	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	la_z7_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1926	3427	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	la_z7_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1916	3401	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22
xc7z100	ffg1156	2	la_z7_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1697	3113	0	0	0	1	1	0	0	PRODUCTION 1.12 2019-11-22

Zynq UltraScale+

Part Information			Configuration Parameters									Resource Utilization
Device	Package	Speed Grade	Configuration Name	Mode	Management_Interface	Config_Interface	Auto_Negotiation	AN_Config_Interface	GMII_or_MII_Mode	SupportLevel	TransceiverControl	LUTs	FFs	DSPs	36k BRAMs	18k BRAMs	BUFGCE	BUFGCE_DIV	BUFG_GT	Speedfile Status
xczu19eg	ffvd1760	3	v_zup_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2335	4361	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	v_zup_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2326	4353	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	v_zup_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2028	3957	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	v_zup_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2332	4353	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	v_zup_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2322	4345	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	v_zup_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2002	3933	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	v_zup_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1854	3645	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	v_zup_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1841	3637	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	v_zup_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1624	3317	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	va_zup_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2343	4351	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	va_zup_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2326	4343	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	va_zup_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2028	3947	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	va_zup_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2332	4343	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	va_zup_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2322	4335	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	va_zup_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2002	3923	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	va_zup_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1854	3635	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	va_zup_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1841	3627	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	va_zup_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1624	3307	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	w_zup_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2415	4749	0	0	0	10	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	w_zup_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2384	4741	0	0	0	10	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	w_zup_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2056	4277	0	0	0	10	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	w_zup_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2374	4733	0	0	0	10	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	w_zup_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2400	4725	0	0	0	10	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	w_zup_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2028	4209	0	0	0	10	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	w_zup_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1882	3985	0	0	0	10	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	w_zup_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1868	3937	0	0	0	10	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	w_zup_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1648	3617	0	0	0	10	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	wa_zup_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2407	4719	0	0	0	9	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	wa_zup_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2376	4711	0	0	0	9	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	wa_zup_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2047	4247	0	0	0	9	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	wa_zup_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2366	4703	0	0	0	9	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	wa_zup_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2392	4695	0	0	0	9	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	wa_zup_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2021	4179	0	0	0	9	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	wa_zup_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1874	3955	0	0	0	9	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	wa_zup_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1857	3907	0	0	0	9	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	wa_zup_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1640	3587	0	0	0	9	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	x_zup_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Core	false	2491	4543	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	x_zup_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Core	false	2468	4535	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	x_zup_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Core	false	2144	4087	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	x_zup_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Core	false	2461	4527	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	x_zup_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Core	false	2486	4519	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	x_zup_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Core	false	2111	4019	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	x_zup_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Core	false	1955	3779	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	x_zup_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Core	false	1946	3747	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	x_zup_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Core	false	1731	3427	0	0	0	2	1	3	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	xa_zup_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2483	4513	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	xa_zup_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2460	4505	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	xa_zup_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2136	4057	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	xa_zup_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2448	4497	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	xa_zup_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2479	4489	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	xa_zup_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2103	3989	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	xa_zup_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1948	3749	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	xa_zup_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1938	3717	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025
xczu19eg	ffvd1760	3	xa_zup_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1723	3397	0	0	0	1	0	1	PRODUCTION 1.31 12-08-2025

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