Resource Utilization for Serial RapidIO Gen2 v4.1

Vivado Design Suite Release 2019.1

Interpreting the results

This page contains resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.


Part Information Configuration Parameters Resource Utilization
Device Package Speed Grade Configuration Name
Fixed clocks (MHz) LUTs FFs DSP48s 36k BRAMs 18k BRAMs BUFGCTRL BUFR MMCME2_ADV Speedfile Status
xc7k325t ffg900 -2 srio_gen2_conf_1x 1 2.5 125 true true Production Example_Design drpclk_in=31 gt_clk_in=125 gt_pcs_clk_in=62 log_clk_in=31 phy_clk_in=31 refclk_in=125 6233 7402 0 4 0 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t ffg900 -2 srio_gen2_conf_2x 2 2.5 125 true true Production Example_Design drpclk_in=62 gt_clk_in=125 gt_pcs_clk_in=62 log_clk_in=62 phy_clk_in=62 refclk_in=125 7669 8246 0 4 0 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t ffg900 -3 srio_gen2_conf_4x 4 2.5 125 true true Production Example_Design drpclk_in=125 gt_clk_in=125 gt_pcs_clk_in=62 log_clk_in=125 phy_clk_in=125 refclk_in=125 9627 9957 0 4 0 0 0 0 PRODUCTION 1.12 2017-02-17


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