Zynq UltraScale+ Devices Register Reference > Module Summary > R5_DBG_1 Module > CLAIMSET (R5_DBG_1) Register

CLAIMSET (R5_DBG_1) Register

CLAIMSET (R5_DBG_1) Register Description

Register NameCLAIMSET
Relative Address0x0000000FA0
Absolute Address 0x00FEBF2FA0 (CORESIGHT_R5_DBG_1)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionClaim Tag Set Register

CLAIMSET (R5_DBG_1) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
CLAIM 7:0rwNormal read/write0Claim set bits. RAO. Writing a 1 to one of these bits sets the corresponding CLAIM bit to 1. This is an indirect write to the CLAIM bits.A single write operation can set multiple bits to 1. Writing 0 to one of these bits has no effect.