Zynq UltraScale+ Devices Register Reference > Module Summary > A53_DBG_3 Module > DBGDTRRX_EL0 (A53_DBG_3) Register
Register Name | DBGDTRRX_EL0 |
---|---|
Relative Address | 0x0000000080 |
Absolute Address | 0x00FEF10080 (CORESIGHT_A53_DBG_3) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Debug Data Transfer Register Receive |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
DBGDTRRX_EL0 | 31:0 | rwNormal read/write | 0 | Update DTRRX. Writes to this register update the value in DTRRX and set RXfull to 1.Reads of this register return the last value written to DTRRX and do not change RXfull. |