Zynq UltraScale+ Devices Register Reference > Module Summary > PCIE_ATTRIB Module > ATTR_72 (PCIE_ATTRIB) Register
Register Name | ATTR_72 |
---|---|
Relative Address | 0x0000000120 |
Absolute Address | 0x00FD480120 (PCIE_ATTRIB) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000001 |
Description | ATTR_72 |
This register should only be written to during reset of the PCIe block
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
attr_rbar_cap_sup4 | 15:0 | rwNormal read/write | 0x1 | BAR Size Supported vector for Resizable BAR Capability Register(4). Bits[3:0] and [31:24] sould always be driven to 0. |