Zynq UltraScale+ Devices Register Reference > Module Summary > PMU_IOMODULE Module > GPO1 (PMU_IOMODULE) Register

GPO1 (PMU_IOMODULE) Register

GPO1 (PMU_IOMODULE) Register Description

Register NameGPO1
Relative Address0x0000000014
Absolute Address 0x00FFD40014 (PMU_IOMODULE)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionPMU to MIO Signals (GPO1)

GPOs assigned to MIO for signaling and Power Supply Management

GPO1 (PMU_IOMODULE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:11razRead as zero0x0reserved
Reserved10razRead as zero0x0reserved
Reserved 9:6razRead as zero0x0reserved
MIO_5 5woWrite-only0x0GPO to MIO
MIO_4 4woWrite-only0x0GPO to MIO
MIO_3 3woWrite-only0x0GPO to MIO
MIO_2 2woWrite-only0x0GPO to MIO
MIO_1 1woWrite-only0x0GPO to MIO
MIO_0 0woWrite-only0x0GPO to MIO

This register holds the value that will be driven to the corresponding bits in the I/O Module GPO2 port output signals.
All bits are in the register are updated wihen the register is written.