Zynq UltraScale+ Devices Register Reference > Module Summary > GPIO Module > INT_MASK_2 (GPIO) Register

INT_MASK_2 (GPIO) Register

INT_MASK_2 (GPIO) Register Description

Register NameINT_MASK_2
Relative Address0x000000028C
Absolute Address 0x00FF0A028C (GPIO)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x03FFFFFF
DescriptionInterrupt Mask Status (GPIO Bank2, MIO)

This register operates in exactly the same manner as INT_MASK_0, except that it reflects bank2, which corresponds to MIO[77:52].

INT_MASK_2 (GPIO) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:26razRead as zero0x0Not used, read back as zero
INT_MASK_225:0roRead-only0x3FFFFFFInterrupt mask
0: interrupt source enabled
1: interrupt source masked
Each bit reports the status for the corresponding pin within the 26-bit bank