Zynq UltraScale+ Devices Register Reference > Module Summary > SERDES Module > L2_PLL_SS_STEPS_0_LSB (SERDES) Register

L2_PLL_SS_STEPS_0_LSB (SERDES) Register

L2_PLL_SS_STEPS_0_LSB (SERDES) Register Description

Register NameL2_PLL_SS_STEPS_0_LSB
Relative Address0x000000A368
Absolute Address 0x00FD40A368 (SERDES)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionRegister value is generated by Vivado PCW.

L2_PLL_SS_STEPS_0_LSB (SERDES) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PLL_SS_STEPS_0_LSB_31_8_rsvd31:8roRead-only0x0Value generated by PCW.
ss_num_of_steps_0_lsb 7:0rwNormal read/write0x0Value generated by PCW.