Zynq UltraScale+ Devices Register Reference > Module Summary > DISPLAY_PORT Module > DP_CORE_ID (DISPLAY_PORT) Register

DP_CORE_ID (DISPLAY_PORT) Register

DP_CORE_ID (DISPLAY_PORT) Register Description

Register NameDP_CORE_ID
Relative Address0x00000000FC
Absolute Address 0x00FD4A00FC (DISPLAY_PORT)
Width32
TyperoRead-only
Reset Value0x01020000
DescriptionReturns the unique identification code of the core and the current revision level

DP_CORE_ID (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
ID31:0roRead-only0x1020000The value is 32'h01_02_00_00.