Zynq UltraScale+ Devices Register Reference > Module Summary > SATA_AHCI_PORTCNTRL Module > CMDS (SATA_AHCI_PORTCNTRL) Register
Register Name | CMDS |
---|---|
Relative Address | 0x0000000074 |
Absolute Address |
0x00FD0C0174 (SATA_AHCI_PORT0_CNTRL) 0x00FD0C01F4 (SATA_AHCI_PORT1_CNTRL) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000002 |
Description | CMDS - Port 0/1 Command Status Error. |
The BIST operation as programmed by the SATA must report the operation as passing or failing. This bit is added to reflect the status of the BIST operation running in the link layer. Note: All Status Registers have no predefined Reset value. The value shown in reset is a typical value that will be read after reset but will be dependent on the PS-GTR status, the actual value read can differ.
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:12 | roRead-only | 0x0 | Reserved |
CQMS | 11:8 | roRead-only | 0x0 | Command Queue Machine State (CQMS) 0: CSSIdle |
CS | 7:0 | roRead-only | 0x2 | Command State (CS) 2: CMWE |