Zynq UltraScale+ Devices Register Reference > Module Summary > R5_ETM_0 Module > MISCOUT (R5_ETM_0) Register
Register Name | MISCOUT |
---|---|
Relative Address | 0x0000000EDC |
Absolute Address | 0x00FEBFCEDC (CORESIGHT_R5_ETM_0) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Miscellaneous Outputs Register |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
EXTOUT | 9:8 | rwNormal read/write | 0x0 | Drives the EXTOUT[1:0] output pins. |
ETMWFIREADY | 5 | rwNormal read/write | 0x0 | Drives the nETMWFIREADY output pin. |
ETMDBGRQ | 4 | rwNormal read/write | 0x0 | Drives the ETMDBGRQ output pin. |