Zynq UltraScale+ Devices Register Reference > Module Summary > GEM Module > deferred_frames (GEM) Register
Register Name | deferred_frames |
---|---|
Relative Address | 0x0000000148 |
Absolute Address |
0x00FF0B0148 (GEM0) 0x00FF0C0148 (GEM1) 0x00FF0D0148 (GEM2) 0x00FF0E0148 (GEM3) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | Deferred Transmission Frames |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:18 | roRead-only | 0x0 | Reserved, read as 0, ignored on write. |
count | 17:0 | rwNormal read/write | 0x0 | Deferred transmission frames - an 18 bit register counting the number of frames experiencing deferral due to carrier sense being active on their first attempt at transmission. Frames involved in any collision are not counted nor are frames that experienced a transmit under run. |