Zynq UltraScale+ Devices Register Reference > Module Summary > NAND Module > ECC_Spare_Command_Register (NAND) Register
Register Name | ECC_Spare_Command_Register |
---|---|
Relative Address | 0x000000003C |
Absolute Address | 0x00FF10003C (NAND) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | ECC Spare Command |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31 | razRead as zero | 0x0 | reserved |
Number_of_ECC_and_Spare_Address_cycles | 30:28 | rwNormal read/write | 0x0 | 000: Not Used 001: One Address Cycle 010: Two Address Cycle .. 111: Seven Address Cycle Note: Change this value only when controller is not communicating with the memory device. |
Reserved | 27:16 | razRead as zero | 0x0 | reserved |
ECC_Spare_cmd | 15:0 | rwNormal read/write | 0x0 | Register used to program the Spare /ECC opcode for change write column / change read column. Note: Change this value only when controller is not communicating with the memory device. |