Zynq UltraScale+ Devices Register Reference > Module Summary > DISPLAY_PORT Module > AV_BUF_HCOUNT_VCOUNT_INT1 (DISPLAY_PORT) Register
Register Name | AV_BUF_HCOUNT_VCOUNT_INT1 |
---|---|
Relative Address | 0x000000B078 |
Absolute Address | 0x00FD4AB078 (DISPLAY_PORT) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | AV_BUF_HCOUNT_VCOUNT_INT1: When the early VTC timing values(VCOUNT and HCOUNT) match the values programmed in this register and corresponding interrupt mask is enabled, an interrupt is generated |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
HCOUNT | 29:16 | rwNormal read/write | 0x0 | HCOUNT value to match |
VCOUNT | 13:0 | rwNormal read/write | 0x0 | VCOUNT value to match |