Zynq UltraScale+ Devices Register Reference > Module Summary > AXIPCIE_MAIN Module > MSGF_DMA_MASK (AXIPCIE_MAIN) Register

MSGF_DMA_MASK (AXIPCIE_MAIN) Register

MSGF_DMA_MASK (AXIPCIE_MAIN) Register Description

Register NameMSGF_DMA_MASK
Relative Address0x0000000464
Absolute Address 0x00FD0E0464 (AXIPCIE_MAIN)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionDMA Interrupt Mask.

MSGF_DMA_MASK (AXIPCIE_MAIN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:1roRead-only0x0
msgf_dma_mask 0rwNormal read/write0x0An interrupt is generated on the int_dma output port when (msgf_dma_status & msgf_dma_mask) != 0.