Zynq UltraScale+ Devices Register Reference > Module Summary > DISPLAY_PORT Module > AUD_CH_B_DATA_REG2 (DISPLAY_PORT) Register

AUD_CH_B_DATA_REG2 (DISPLAY_PORT) Register

AUD_CH_B_DATA_REG2 (DISPLAY_PORT) Register Description

Register NameAUD_CH_B_DATA_REG2
Relative Address0x000000C040
Absolute Address 0x00FD4AC040 (DISPLAY_PORT)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionAUD_CH_B_DATA_REG2: User data bits 95 to 64.

AUD_CH_B_DATA_REG2 (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
USER_DATA231:0rwNormal read/write0x0-