Zynq UltraScale+ Devices Register Reference > Module Summary > USB3_XHCI Module > GDBGLNMCC (USB3_XHCI) Register

GDBGLNMCC (USB3_XHCI) Register

GDBGLNMCC (USB3_XHCI) Register Description

Register NameGDBGLNMCC
Relative Address0x000000C168
Absolute Address 0x00FE20C168 (USB3_0_XHCI)
0x00FE30C168 (USB3_1_XHCI)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionGlobal Debug LNMCC Register
Bit Bash test should not be done on this debug register.

GDBGLNMCC (USB3_XHCI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:9roRead-only0x0Reserved
LNMCC_BERC 8:0roRead-only0x0This field indicates the bit error rate information for the port selected in the GDBGFIFOSPACE.PortSelect field.
This field is for debug purposes only.