Zynq UltraScale+ Devices Register Reference > Module Summary > IOU_SLCR Module > bank2_ctrl6 (IOU_SLCR) Register

bank2_ctrl6 (IOU_SLCR) Register

bank2_ctrl6 (IOU_SLCR) Register Description

Register Namebank2_ctrl6
Relative Address0x0000000184
Absolute Address 0x00FF180184 (IOU_SLCR)
Width26
TyperwNormal read/write
Reset Value0x00000000
DescriptionMIO Bank 2, Output slew rate select.

bank2_ctrl6 (IOU_SLCR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
slow_fast_slew_n25:0rwNormal read/write0x0Select between fast and slow output slew rates for MIO pins [52:77].
0 = fast slew rate.
1 = slow slew rate.
Bit [0] controls MIO pin 52.
..
Bit [25] controls MIO pin 77.
Bits [26] to [31] are reserved.