Zynq UltraScale+ Devices Register Reference > Module Summary > RPU Module > RPU0_STATUS (RPU) Register

RPU0_STATUS (RPU) Register

RPU0_STATUS (RPU) Register Description

Register NameRPU0_STATUS
Relative Address0x0000000104
Absolute Address 0x00FF9A0104 (RPU)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x0000003F
DescriptionR5_0 Status Register

RPU0_STATUS (RPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:6razRead as zero0x0Reserved for future use
nVALRESET 5roRead-only0x1Validation Signal: Request for a reset
nVALIRQ 4roRead-only0x1Validation Signal: Request for an interrupt
nVALFIQ 3roRead-only0x1Validation Signal: Request for an fast interrupt
nWFIPIPESTOPPED 2roRead-only0x1When LOW, this indicates the CPU is in standby mode because of a WFI instruction. The
CPU pipeline is inactive
nWFEPIPESTOPPED 1roRead-only0x1When LOW, this indicates that the CPU is in standby mode because of a WFE instruction.The CPU pipeline is inactive
nCLKSTOPPED 0roRead-only0x1When LOW, this indicates clock has been stopped because processor is in Standby Mode.It is never asserted without one of WFIPIPESTOPPEDm or WFEPIPESTOPPEDm.