Zynq UltraScale+ Devices Register Reference > Module Summary > STM Module > HEEXTMUXR (STM) Register
Register Name | HEEXTMUXR |
---|---|
Relative Address | 0x0000000D68 |
Absolute Address | 0x00FE9C0D68 (CORESIGHT_SOC_STM) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Control hardware event multiplexors external to STM. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
EXTMUX | 7:0 | rwNormal read/write | 0 | Specifies the value that the optional external multiplexing logic uses to select the hardware events to connect to the STM. The value of this register is an output from the STM on the HEEXTMUX[7:0] signals. The behavior of the multiplexing logic is IMPLEMENTATION DEFINED. This field is reset to zero. |