Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_CB0_IPAFAR_low (SMMU500) Register

SMMU_CB0_IPAFAR_low (SMMU500) Register

SMMU_CB0_IPAFAR_low (SMMU500) Register Description

Register NameSMMU_CB0_IPAFAR_low
Relative Address0x0000010070
Absolute Address 0x00FD810070 (SMMU_GPV)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionThe stage 1 IPA Fault Address Lower bits [31:0] Register.

SMMU_CB0_IPAFAR_low (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
ipafar_l31:12rwNormal read/write0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
far_ro11:0roRead-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details