Zynq UltraScale+ Devices Register Reference > Module Summary > CSU Module > pcap_rdwr (CSU) Register

pcap_rdwr (CSU) Register

pcap_rdwr (CSU) Register Description

Register Namepcap_rdwr
Relative Address0x0000003004
Absolute Address 0x00FFCA3004 (CSU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionPCAP Read Write Control

pcap_rdwr (CSU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
pcap_rdwr_b 0rwNormal read/write0x0This bit controls the read/write direction of the PCAP
0x0 - write
0x1 - read