Zynq UltraScale+ Devices Register Reference > Module Summary > PMU_IOMODULE Module > PIT1_PRELOAD (PMU_IOMODULE) Register
Register Name | PIT1_PRELOAD |
---|---|
Relative Address | 0x0000000050 |
Absolute Address | 0x00FFD40050 (PMU_IOMODULE) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | PIT1 Preload Register |
The value written to this register determines the period between two consecutive PIT1_Interrupt events. The period is the value written to the register + 2 count events.
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
PIT1_PRELOAD | 31:0 | roRead-only | 0x0 | Register holds the timer period |