Zynq UltraScale+ Devices Register Reference > Module Summary > GPU Module > PP1_ORIGIN_OFFSET_Y (GPU) Register

PP1_ORIGIN_OFFSET_Y (GPU) Register

PP1_ORIGIN_OFFSET_Y (GPU) Register Description

Register NamePP1_ORIGIN_OFFSET_Y
Relative Address0x000000A044
Absolute Address 0x00FD4BA044 (GPU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionOrigin Offset Y Register

PP1_ORIGIN_OFFSET_Y (GPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:16rwNormal read/write0x0Reserved, write as zero, read undefined.
ORIGIN_OFFSET_Y15:0rwNormal read/write0x0Y offset of the screen space coordinate system