Zynq UltraScale+ Devices Register Reference > Module Summary > PL390 Module > control_n_integ_en_c_n (PL390) Register
Register Name | control_n_integ_en_c_n |
---|---|
Relative Address | 0x0000001040 |
Absolute Address | 0x00F9001040 (RCPU_GIC) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Enables the integration test logic to modify the status of the nfiq_c<n> and nirq_c<n> signals. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
integ_en | 0 | rwNormal read/write | 0 | Enables the integration test logic. |