Zynq UltraScale+ Devices Register Reference > Module Summary > SATA_AHCI_PORTCNTRL Module > PxSERR (SATA_AHCI_PORTCNTRL) Register

PxSERR (SATA_AHCI_PORTCNTRL) Register

PxSERR (SATA_AHCI_PORTCNTRL) Register Description

Register NamePxSERR
Relative Address0x0000000030
Absolute Address 0x00FD0C0130 (SATA_AHCI_PORT0_CNTRL)
0x00FD0C01B0 (SATA_AHCI_PORT1_CNTRL)
Width32
TypewtcReadable, write a 1 to clear
Reset Value0x00000000
DescriptionPort x Serial ATA Error (SCR1: SError)

Error BIt Fields: The ERR_x field contains error information for use by host software in determining the appropriate response to the error condition. Diagnostics Bit Fields - The DIAG_x diagnostic error information is for use by diagnostic software in validating correct operation or isolating failure modes.

PxSERR (SATA_AHCI_PORTCNTRL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:27wtcReadable, write a 1 to clear0x0Reserved
DIAG_X26wtcReadable, write a 1 to clear0x0Exchanged (X): When set to one this bit indicates that a change in device presence has been detected since the last time this bit was cleared.
The means by which the implementation determines that the device presence has changed is vendor specific. This bit shall always be set to one anytime a COMINIT signal is received.
This bit is reflected in the PxIS.PCS bit.
DIAG_F25wtcReadable, write a 1 to clear0x0Unknown FIS Type (F): Indicates that one or more FISs were received by the Transport layer with good CRC, but had a type field that was not recognized/known.
DIAG_T24wtcReadable, write a 1 to clear0x0Transport state transition error (T): Indicates that an error has occurred in the transition from one state to another within the Transport layer since the last time this bit was cleared.
DIAG_S23wtcReadable, write a 1 to clear0x0Link Sequence Error (S): Indicates that one or more Link state machine error conditions was encountered. The Link Layer state machine defines the conditions under which the link layer detects an erroneous transition.
DIAG_H22wtcReadable, write a 1 to clear0x0Handshake Error (H): Indicates that one or more R_ERR handshake response was received in response to frame transmission. Such errors may be the result of a CRC error detected by the recipient, a disparity or 8b/10b decoding error, or other error condition leading to a negative handshake on a transmitted frame.
DIAG_C21wtcReadable, write a 1 to clear0x0CRC Error (C): Indicates that one or more CRC errors occurred with the Link Layer.
DIAG_D20wtcReadable, write a 1 to clear0x0Disparity Error (D): This field is not used by AHCI.
DIAG_B19wtcReadable, write a 1 to clear0x010B to 8B Decode Error (B): Indicates that one or more 10B to 8B decoding errors occurred.
DIAG_W18wtcReadable, write a 1 to clear0x0Comm Wake (W): Indicates that a Comm Wake signal was detected by the Phy.
DIAG_I17wtcReadable, write a 1 to clear0x0Phy Internal Error (I): Indicates that the Phy detected some internal error.
DIAG_N16wtcReadable, write a 1 to clear0x0PhyRdy Change (N): Indicates that the PhyRdy signal changed state.
This bit is reflected in the PxIS.PRCS bit.
Reserved15:12wtcReadable, write a 1 to clear0x0Reserved
ERR_E11wtcReadable, write a 1 to clear0x0Internal Error (E): The host bus adapter experienced an internal error that caused the operation to fail and may have put the host bus adapter into an error state.
The internal error may include a master or target abort when attempting to access system memory, an elasticity buffer overflow, a primitive mis-alignment, a synchronization FIFO overflow, and other internal error conditions.
Typically when an internal error occurs, a non-fatal or fatal status bit in the PxIS register will also be set to give software guidance on the recovery mechanism required.
ERR_P10wtcReadable, write a 1 to clear0x0Protocol Error (P): A violation of the Serial ATA protocol was detected
ERR_C 9wtcReadable, write a 1 to clear0x0Persistent Communication or Data Integrity Error (C): A communication error that was not recovered occurred that is expected to be persistent.
Persistent communications errors may arise from faulty interconnect with the device, from a device that has been removed or has failed, or a number of other causes.
ERR_T 8wtcReadable, write a 1 to clear0x0Transient Data Integrity Error (T): A data integrity error occurred that was not recovered by the interface.
Reserved 7:2wtcReadable, write a 1 to clear0x0Reserved
ERR_M 1wtcReadable, write a 1 to clear0x0Recovered Communications Error (M): Communications between the device and host was temporarily lost but was re-established. This can arise from a device temporarily being removed, from a temporary loss of Phy synchronization, or from other causes and may be derived from the PhyNRdy signal between the Phy and Link layers.
ERR_I 0wtcReadable, write a 1 to clear0x0Recovered Data Integrity Error (I): A data integrity error occurred that was recovered by the interface through a retry operation or other recovery action.