Zynq UltraScale+ Devices Register Reference > Module Summary > LPD_SLCR_SECURE Module > itr (LPD_SLCR_SECURE) Register

itr (LPD_SLCR_SECURE) Register

itr (LPD_SLCR_SECURE) Register Description

Register Nameitr
Relative Address0x0000000018
Absolute Address 0x00FF4B0018 (LPD_SLCR_SECURE)
Width 1
TypewoWrite-only
Reset Value0x00000000
DescriptionInterrupt Trigger Register

Write a 1 to set the interrupt status register related to this interrupt.

itr (LPD_SLCR_SECURE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
addr_decode_err 0woWrite-only0x0Trigger an address decode error interrupt.
Writes:
0: ignored.
1: ISR register bit set to 1.