Zynq UltraScale+ Devices Register Reference > Module Summary > GIC400 Module > GICC_EOIR (GIC400) Register

GICC_EOIR (GIC400) Register

GICC_EOIR (GIC400) Register Description

Register NameGICC_EOIR
Relative Address0x0000020010
Absolute Address 0x00F9020010 (ACPU_GIC)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionEnd of Interrupt Register

GICC_EOIR (GIC400) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:0woWrite-only0Refer to the Arm Generic Interrupt Controller Architecture Specification 2.0 for a detailed register descriptions.