Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > PMCFGR (SMMU500) Register

PMCFGR (SMMU500) Register

PMCFGR (SMMU500) Register Description

Register NamePMCFGR
Relative Address0x0000003E00
Absolute Address 0x00FD803E00 (SMMU_GPV)
Width32
TyperoRead-only
Reset Value0x05011F17
DescriptionPerformance Monitor Configuration register containss PMU specific configuration data.

PMCFGR (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
NCG31:24roRead-only0x5Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
UEN19roRead-only0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
EX16roRead-only0x1Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
CCD15roRead-only0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
CC14roRead-only0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
SIZE13:8roRead-only0x1FRefer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
N 7:0roRead-only0x17Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details