Zynq UltraScale+ Devices Register Reference > Module Summary > SIOU Module > crx_ctrl (SIOU) Register
Register Name | crx_ctrl |
---|---|
Relative Address | 0x0000000410 |
Absolute Address | 0x00FD3D0410 (SIOU) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | crx_ctrl |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:2 | roRead-only | 0x0 | Reserved |
refclk_sel | 1:0 | rwNormal read/write | 0x0 | The number of refclk (0 to 3) to be forwarded to Clock and Reset Blocks of the PS |