Zynq UltraScale+ Devices Register Reference > Module Summary > USB3_XHCI Module > GDBGLSP (USB3_XHCI) Register
Register Name | GDBGLSP |
---|---|
Relative Address | 0x000000C174 |
Absolute Address |
0x00FE20C174 (USB3_0_XHCI) 0x00FE30C174 (USB3_1_XHCI) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | Global Debug LSP Register This register is for internal debug purposes only. This register is for internal use only. If DWC_USB3_PRESERVE_LOGIC_ANALYZER_SELECT is enabled during core configuration, then the default values readout is X (Undefined). Bit Bash test should not be done on this debug register. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
LSPDEBUG | 31:0 | roRead-only | 0x0 | LSP Debug Information |