Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_DBGRPTRTBU (SMMU500) Register

SMMU_DBGRPTRTBU (SMMU500) Register

SMMU_DBGRPTRTBU (SMMU500) Register Description

Register NameSMMU_DBGRPTRTBU
Relative Address0x0000000080
Absolute Address 0x00FD800080 (SMMU_GPV)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionAddress of TLB entry in a specific TBU.

SMMU_DBGRPTRTBU (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
TBU_ID26:24rwNormal read/write0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
TLB_Pointer15:4rwNormal read/write0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
TLB_Entry_Pointer 3:0rwNormal read/write0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details