Zynq UltraScale+ Devices Register Reference > Module Summary > DISPLAY_PORT Module > DITHER_CONFIG_SEED1 (DISPLAY_PORT) Register

DITHER_CONFIG_SEED1 (DISPLAY_PORT) Register

DITHER_CONFIG_SEED1 (DISPLAY_PORT) Register Description

Register NameDITHER_CONFIG_SEED1
Relative Address0x000000B084
Absolute Address 0x00FD4AB084 (DISPLAY_PORT)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00008080
DescriptionDescription same as DITHER_CONFIG_SEED0

DITHER_CONFIG_SEED1 (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:16razRead as zero0x0
COLR115:0rwNormal read/write0x8080-