Zynq UltraScale+ Devices Register Reference > Module Summary > GPU Module > PP1_WB1_SOURCE_SELECT (GPU) Register

PP1_WB1_SOURCE_SELECT (GPU) Register

PP1_WB1_SOURCE_SELECT (GPU) Register Description

Register NamePP1_WB1_SOURCE_SELECT
Relative Address0x000000A200
Absolute Address 0x00FD4BA200 (GPU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionWB1 Source Select Register

PP1_WB1_SOURCE_SELECT (GPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:2rwNormal read/write0x0Reserved, write as zero, read undefined.
WB1_SOURCE_SELECT 1:0rwNormal read/write0x0Tile buffer source for the write-back unit.
0 = None, WB is disabled
1 = Z/Stencil buffer
2 = ARGB buffer
3 = Reserved/undefined.