Zynq UltraScale+ Devices Register Reference > Module Summary > PMU_LOCAL Module > L2_CE_CNTRL (PMU_LOCAL) Register

L2_CE_CNTRL (PMU_LOCAL) Register

L2_CE_CNTRL (PMU_LOCAL) Register Description

Register NameL2_CE_CNTRL
Relative Address0x00000000B8
Absolute Address 0x00FFD600B8 (PMU_LOCAL)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000001
DescriptionL2 Cache Memory Chip Enables. Reset only by POR.

Chip Enable control signals. 0: disable memory. 1: enable memory. All fields can be read or written only by the PMU processor. This register maintains its contents during a System Reset.

L2_CE_CNTRL (PMU_LOCAL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:1roRead-only0x0reserved
Bank0 0rwNormal read/write0x1L2 Cache chip enable control.