Zynq UltraScale+ Devices Register Reference > Module Summary > GPU Module > PP0_MMU_INT_CLEAR (GPU) Register

PP0_MMU_INT_CLEAR (GPU) Register

PP0_MMU_INT_CLEAR (GPU) Register Description

Register NamePP0_MMU_INT_CLEAR
Relative Address0x0000004018
Absolute Address 0x00FD4B4018 (GPU)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionMMU Interrupt Clear Register

PP0_MMU_INT_CLEAR (GPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:2woWrite-only0x0Reserved, read undefined, write as zero
read_bus_error 1woWrite-only0x0Read bus error
page_fault 0woWrite-only0x0Page fault