Zynq UltraScale+ Devices Register Reference > Module Summary > CRL_APB Module > BLOCKONLY_RST (CRL_APB) Register

BLOCKONLY_RST (CRL_APB) Register

BLOCKONLY_RST (CRL_APB) Register Description

Register NameBLOCKONLY_RST
Relative Address0x000000021C
Absolute Address 0x00FF5E021C (CRL_APB)
Width 4
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionRecords the Reason for the Block-only Reset.

BLOCKONLY_RST (CRL_APB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved 3wtcReadable, write a 1 to clear0x0reserved.
Reserved 2:1roRead-only0x0reserved.
debug_only 0wtcReadable, write a 1 to clear0x0Only SOC debug will be reset.