Zynq UltraScale+ Devices Register Reference > Module Summary > PCIE_ATTRIB Module > ATTR_98 (PCIE_ATTRIB) Register

ATTR_98 (PCIE_ATTRIB) Register

ATTR_98 (PCIE_ATTRIB) Register Description

Register NameATTR_98
Relative Address0x0000000188
Absolute Address 0x00FD480188 (PCIE_ATTRIB)
Width32
TyperwNormal read/write
Reset Value0x0000FFFF
DescriptionATTR_98

This register should only be written to during reset of the PCIe block

ATTR_98 (PCIE_ATTRIB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr_n_fts_comclk_gen215:8rwNormal read/write0xFFSets the number of FTS sequences advertised in the TS1 Ordered Sets when the Link Configuration register shows that a common clock source is selected (used for all lanes when operating at 5.0 GT/s)
attr_n_fts_comclk_gen1 7:0rwNormal read/write0xFFSets the number of FTS sequences advertised in the TS1 Ordered Sets when the Link Configuration register shows that a common clock source is selected (used for all lanes when operating at 2.5 GT/s)