Zynq UltraScale+ Devices Register Reference > Module Summary > TSGEN Module > CNTCVL (TSGEN) Register

CNTCVL (TSGEN) Register

CNTCVL (TSGEN) Register Description

Register NameCNTCVL
Relative Address0x0000000008
Absolute Address 0x00FE900008 (CORESIGHT_SOC_TSGEN)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionCurrent value of Counter. Lower 32-bits.

CNTCVL (TSGEN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
CNTCVL_L_3231:0rwNormal read/write0x0Current value of Counter. Lower 32-bits