Zynq UltraScale+ Devices Register Reference > Module Summary > RPU Module > RPU1_STATUS (RPU) Register
Register Name | RPU1_STATUS |
---|---|
Relative Address | 0x0000000204 |
Absolute Address | 0x00FF9A0204 (RPU) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x0000003F |
Description | R5_1 Status Register |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:6 | razRead as zero | 0x0 | Reserved for future use |
nVALRESET | 5 | roRead-only | 0x1 | Validation Signal: Request for a reset |
nVALIRQ | 4 | roRead-only | 0x1 | Validation Signal: Request for an interrupt |
nVALFIQ | 3 | roRead-only | 0x1 | Validation Signal: Request for an fast interrupt |
nWFIPIPESTOPPED | 2 | roRead-only | 0x1 | When LOW, this indicates the CPU is in standby mode because of a WFI instruction. The CPU pipeline is inactive |
nWFEPIPESTOPPED | 1 | roRead-only | 0x1 | When LOW, this indicates that the CPU is in standby mode because of a WFE instruction.The CPU pipeline is inactive |
nCLKSTOPPED | 0 | roRead-only | 0x1 | When high, indicates that RPU has stopped its clocks |