Zynq UltraScale+ Devices Register Reference > Module Summary > GPU Module > PP0_ORIGIN_OFFSET_X (GPU) Register

PP0_ORIGIN_OFFSET_X (GPU) Register

PP0_ORIGIN_OFFSET_X (GPU) Register Description

Register NamePP0_ORIGIN_OFFSET_X
Relative Address0x0000008040
Absolute Address 0x00FD4B8040 (GPU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionOrigin Offset X Register

PP0_ORIGIN_OFFSET_X (GPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:16rwNormal read/write0x0Reserved, write as zero, read undefined.
ORIGIN_OFFSET_X15:0rwNormal read/write0x0X offset of the screen space coordinate system