Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_PIDR1 (SMMU500) Register

SMMU_PIDR1 (SMMU500) Register

SMMU_PIDR1 (SMMU500) Register Description

Register NameSMMU_PIDR1
Relative Address0x0000000FE4
Absolute Address 0x00FD800FE4 (SMMU_GPV)
Width32
TyperoRead-only
Reset Value0x000000B4
DescriptionPeripheral Identificaation register 1

SMMU_PIDR1 (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
JEP106_identity_code 7:4roRead-only0xBRefer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
PartNumber1 3:0roRead-only0x4Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details