Zynq UltraScale+ Devices Register Reference > Module Summary > PMU_LOCAL Module > ACPU0_PWR_STATUS (PMU_LOCAL) Register

ACPU0_PWR_STATUS (PMU_LOCAL) Register

ACPU0_PWR_STATUS (PMU_LOCAL) Register Description

Register NameACPU0_PWR_STATUS
Relative Address0x0000000004
Absolute Address 0x00FFD60004 (PMU_LOCAL)
Width32
TyperoRead-only
Reset Value0x0000000F
DescriptionAPU Core 0 Power Status. Reset by POR only.

Status of the power switch gates. 0: off. 1: on, ready. All fields are read-only and are accessible only by the PMU processor. This register maintains its contents during a System Reset.

ACPU0_PWR_STATUS (PMU_LOCAL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:4roRead-only0x0reserved
Pwr_Gates 3:0roRead-only0xFStatus of power switch gates {0:3} for APU core 0.