Zynq UltraScale+ Devices Register Reference > Module Summary > TTC Module > Match_1_Counter_3 (TTC) Register
Register Name | Match_1_Counter_3 |
---|---|
Relative Address | 0x0000000038 |
Absolute Address |
0x00FF110038 (TTC0) 0x00FF120038 (TTC1) 0x00FF130038 (TTC2) 0x00FF140038 (TTC3) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Match value |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Match | 31:0 | rwNormal read/write | 0x0 | When a counter has the same value as is stored in one of its match registers and match mode is enabled, a match interrupt is generated. Each counter has three match registers. |