Zynq UltraScale+ Devices Register Reference > Module Summary > DISPLAY_PORT Module > DP_TRANSMITTER_ENABLE (DISPLAY_PORT) Register
Register Name | DP_TRANSMITTER_ENABLE |
---|---|
Relative Address | 0x0000000080 |
Absolute Address | 0x00FD4A0080 (DISPLAY_PORT) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | Enable the basic operations of the transmitter. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:1 | razRead as zero | 0x0 | |
TX_EN | 0 | rwNormal read/write | 0x0 | When set to 0, all lanes of the main link will output stuffing symbols |