Zynq UltraScale+ Devices Register Reference > Module Summary > UART Module
Module Name | UART Module |
---|---|
Modules of this Type | UART0, UART1 |
Base Address | 0x00FF000000 (UART0) 0x00FF010000 (UART1) |
Description | UART Controller, UART 0 Controller |
Register Name | Address | Width | Type | Reset Value | Description |
---|---|---|---|---|---|
Control | 0x0000000000 | 32 | mixedMixed types. See bit-field details. | 0x00000128 | UART Control Register |
Mode | 0x0000000004 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | UART Mode Register |
Intrpt_en | 0x0000000008 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Enable Register |
Intrpt_dis | 0x000000000C | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Disable Register |
Intrpt_mask | 0x0000000010 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Mask Register |
Chnl_int_sts | 0x0000000014 | 32 | wtcReadable, write a 1 to clear | 0x00000200 | Channel Interrupt Status Register |
Baud_rate_gen | 0x0000000018 | 32 | mixedMixed types. See bit-field details. | 0x0000028B | Baud Rate Generator Register. |
Rcvr_timeout | 0x000000001C | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Receiver Timeout Register |
Rcvr_FIFO_trigger_level | 0x0000000020 | 32 | mixedMixed types. See bit-field details. | 0x00000020 | Receiver FIFO Trigger Level Register |
Modem_ctrl | 0x0000000024 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Modem Control Register |
Modem_sts | 0x0000000028 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Modem Status Register |
Channel_sts | 0x000000002C | 32 | roRead-only | 0x00000000 | Channel Status Register |
TX_RX_FIFO | 0x0000000030 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Transmit and Receive FIFO |
Baud_rate_divider | 0x0000000034 | 32 | mixedMixed types. See bit-field details. | 0x0000000F | Baud Rate Divider Register |
Flow_delay | 0x0000000038 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Flow Control Delay Register |
Tx_FIFO_trigger_level | 0x0000000044 | 32 | mixedMixed types. See bit-field details. | 0x00000020 | Transmitter FIFO Trigger Level Register |
Rx_FIFO_byte_status | 0x0000000048 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | RX FIFO Byte Status Register |