Zynq UltraScale+ Devices Register Reference > Module Summary > DDRC Module > DFIUPD2 (DDRC) Register

DFIUPD2 (DDRC) Register

DFIUPD2 (DDRC) Register Description

Register NameDFIUPD2
Relative Address0x00000001A8
Absolute Address 0x00FD0701A8 (DDRC)
Width32
TyperwNormal read/write
Reset Value0x80000000
DescriptionDFI Update Register 2

This register is static. Static registers can only be written when the controller is in reset.

DFIUPD2 (DDRC) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
dfi_phyupd_en31rwNormal read/write0x1Enables the support for acknowledging PHY-initiated updates:
- 0 - Disabled
- 1 - Enabled