Zynq UltraScale+ Devices Register Reference > Module Summary > IOU_SLCR Module > CTRL_REG_SD (IOU_SLCR) Register

CTRL_REG_SD (IOU_SLCR) Register

CTRL_REG_SD (IOU_SLCR) Register Description

Register NameCTRL_REG_SD
Relative Address0x0000000310
Absolute Address 0x00FF180310 (IOU_SLCR)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionSD eMMC selection

CTRL_REG_SD (IOU_SLCR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:16razRead as zero0x0Reserved. Writes are ignored, read data is zero.
SD1_EMMC_SEL15rwNormal read/write0x0SD or eMMC selection on SDIO1
0: SD enabled
1: eMMC enabled
Reserved14:1rwNormal read/write0x0Reserved. Writes are ignored, read data is zero.
SD0_EMMC_SEL 0rwNormal read/write0x0SD or eMMC selection on SDIO0
0: SD enabled
1: eMMC enabled