Zynq UltraScale+ Devices Register Reference > Module Summary > DISPLAY_PORT Module > AV_BUF_STC_EXT_VSYNC_TS_REG0 (DISPLAY_PORT) Register
Register Name | AV_BUF_STC_EXT_VSYNC_TS_REG0 |
---|---|
Relative Address | 0x000000B044 |
Absolute Address | 0x00FD4AB044 (DISPLAY_PORT) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | AV_BUF_STC_EXT_VSYNC_TS_REG0: STC TS with external VSYNC event |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
EXT_VSYNC_TS0 | 31:0 | roRead-only | 0x0 | Bits [31:0] - = Bits [31:0] of EXT VSYNC TS register |