Zynq UltraScale+ Devices Register Reference > Module Summary > QSPI Module > GQSPI_IER (QSPI) Register

GQSPI_IER (QSPI) Register

GQSPI_IER (QSPI) Register Description

Register NameGQSPI_IER
Relative Address0x0000000108
Absolute Address 0x00FF0F0108 (QSPI)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionGQSPI Interrupt Enable

Writing a 1 to this register sets the corresponding bits of the interrupt mask register.

GQSPI_IER (QSPI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:12razRead as zero0x0reserved
RX_FIFO_EMPTY11woWrite-only0x0RX FIFO Empty interrupt enable
1: enable the interrupt
0: no effect
Gen_FIFO_full10woWrite-only0x0Generic FIFO full
interrupt enable
1: enable the interrupt
0: no effect
Gen_FIFO_not_full 9woWrite-only0x0Generic FIFO not full interrupt enable
1: enable the interrupt
0: no effect
TX_FIFO_EMPTY 8woWrite-only0x0TX FIFO Empty interrupt enable
1: enable the interrupt
0: no effect
Gen_FIFO_Empty 7woWrite-only0x0Generic FIFO Empty
interrupt enable
1: enable the interrupt
0: no effect
Reserved 6razRead as zero0x0Reserved, read as zero, ignored on write.
RX_FIFO_full 5woWrite-only0x0RX FIFO full
enable
1: enable the interrupt
0: no effect
RX_FIFO_not_empty 4woWrite-only0x0RX FIFO not empty
enable
1: enable the interrupt
0: no effect
TX_FIFO_full 3woWrite-only0x0TX FIFO full
enable
1: enable the interrupt
0: no effect
TX_FIFO_not_full 2woWrite-only0x0TX FIFO not full
enable
1: enable the interrupt
0: no effect
Poll_Time_Expire 1woWrite-only0x0Poll Time out counter expire
interrupt enable
1: enable the interrupt
0: no effect
Reserved 0razRead as zero0x0Reserved, read as zero, ignored on write.