Zynq UltraScale+ Devices Register Reference > Module Summary > STM Module > HETER (STM) Register

HETER (STM) Register

HETER (STM) Register Description

Register NameHETER
Relative Address0x0000000D20
Absolute Address 0x00FE9C0D20 (CORESIGHT_SOC_STM)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionEnable Trigger Generation on Hardware Events.

HETER (STM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
HETE31:0rwNormal read/write0Bit mask to enable trigger generation from the hardware events, with one bit per hardware event.0 = disabled1 = enabled