Zynq UltraScale+ Devices Register Reference > Module Summary > STM Module > CIDR1 (STM) Register
Register Name | CIDR1 |
---|---|
Relative Address | 0x0000000FF4 |
Absolute Address | 0x00FE9C0FF4 (CORESIGHT_SOC_STM) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000090 |
Description | CID - Indentification Registers Present and Component Class. |
A component identification register, that indicates that the identification registers are present. This register also indicates the component class.
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
CLASS | 7:4 | roRead-only | 0x9 | Class of the component, for example, ROM table or CoreSight component. |
PRMBL_1 | 3:0 | roRead-only | 0x0 | Contains bits [19:16] of the component identification. |