Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_TLBIVMID (SMMU500) Register

SMMU_TLBIVMID (SMMU500) Register

SMMU_TLBIVMID (SMMU500) Register Description

Register NameSMMU_TLBIVMID
Relative Address0x0000000064
Absolute Address 0x00FD800064 (SMMU_GPV)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionInvalidates all Non-secure non-Hyp TLB entries having the specified VMID.

SMMU_TLBIVMID (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
VMID 7:0woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details