Zynq UltraScale+ Devices Register Reference > Module Summary > GIC400 Module > GICD_ITARGETSR3 (GIC400) Register

GICD_ITARGETSR3 (GIC400) Register

GICD_ITARGETSR3 (GIC400) Register Description

Register NameGICD_ITARGETSR3
Relative Address0x000001080C
Absolute Address 0x00F901080C (ACPU_GIC)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionInterrupt Processor Targets Registers

GICD_ITARGETSR3 (GIC400) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:0roRead-only0Refer to the Arm Generic Interrupt Controller Architecture Specification 2.0 for a detailed register descriptions.