Zynq UltraScale+ Devices Register Reference > Module Summary > FPD_SLCR Module > afi_fs (FPD_SLCR) Register

afi_fs (FPD_SLCR) Register

afi_fs (FPD_SLCR) Register Description

Register Nameafi_fs
Relative Address0x0000005000
Absolute Address 0x00FD615000 (FPD_SLCR)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000A00
Descriptionafi fs SLCR control register. This register is static and should not be modified during operation.

afi_fs (FPD_SLCR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:12razRead as zero0x0RESERVED. Return 0 when read. Writes ignored.
dw_ss1_sel11:10rwNormal read/write0x2Select the 32/64/128-bit data width selection for the Slave 1
00: 32-bit AXI data width
01: 64-bit AXI data width
10: 128-bit AXI data width(default)
11: reserved
dw_ss0_sel 9:8rwNormal read/write0x2Select the 32/64/128-bit data width selection for the Slave 0
00: 32-bit AXI data width (default)
01: 64-bit AXI data width
10: 128-bit AXI data width
11: reserved
Reserved 7:0razRead as zero0x0RESERVED. Return 0 when read. Writes ignored.