Zynq UltraScale+ Devices Register Reference > Module Summary > A53_PMU_2 Module > ITCTRL (A53_PMU_2) Register

ITCTRL (A53_PMU_2) Register

ITCTRL (A53_PMU_2) Register Description

Register NameITCTRL
Relative Address0x0000000F00
Absolute Address 0x00FEE30F00 (CORESIGHT_A53_PMU_2)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionPerformance Monitors Integration mode Control Register

ITCTRL (A53_PMU_2) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
IME 0rwNormal read/write0x0Integration mode enable. When IME == 1, the device reverts to an integration mode to enable integration testing or topology detection. The integration mode behavior is IMPLEMENTATION DEFINED.