Zynq UltraScale+ Devices Register Reference > Module Summary > PCIE_ATTRIB Module > ATTR_103 (PCIE_ATTRIB) Register
Register Name | ATTR_103 |
---|---|
Relative Address | 0x000000019C |
Absolute Address | 0x00FD48019C (PCIE_ATTRIB) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000022 |
Description | ATTR_103 |
This register should only be written to during reset of the PCIe block
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
attr_vc0_cpl_infinite | 5 | rwNormal read/write | 0x1 | The block will advertise infinite completions. This must be set to 1. Setting this field to 0 (finite completion credits) is not supported for EP and Root configurations |
attr_vc_cap_version | 4:1 | rwNormal read/write | 0x1 | The version of Virtual Channel Capability followed. The value is transferred to the VC Capabilities Register[19:16] |
attr_tl_tx_ram_write_latency | 0 | rwNormal read/write | 0x0 | No impact - this attribute is unused in the block |