Zynq UltraScale+ Devices Register Reference > Module Summary > TSGEN Module > DEVID (TSGEN) Register

DEVID (TSGEN) Register

DEVID (TSGEN) Register Description

Register NameDEVID
Relative Address0x0000000FC8
Absolute Address 0x00FE900FC8 (CORESIGHT_SOC_TSGEN)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionThis register indicates the capabilities.

DEVID (TSGEN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:0roRead-only0x0Reserved