Zynq UltraScale+ Devices Register Reference > Module Summary > USB3_REGS Module > pwr_config_usb3 (USB3_REGS) Register

pwr_config_usb3 (USB3_REGS) Register

pwr_config_usb3 (USB3_REGS) Register Description

Register Namepwr_config_usb3
Relative Address0x0000000048
Absolute Address 0x00FF9D0048 (USB3_0)
0x00FF9E0048 (USB3_1)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionUSB3 PHY power config

pwr_config_usb3 (USB3_REGS) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:30razRead as zero0x0reserved for future
strap29:0rwNormal read/write0x0This is an array of fixed values that indicates which PHY signal may be used to detect connect/disconnect when the core is acting as a device