Zynq UltraScale+ Devices Register Reference > Module Summary > R5_ETM_0 Module > CIDR1 (R5_ETM_0) Register
Register Name | CIDR1 |
---|---|
Relative Address | 0x0000000FF4 |
Absolute Address | 0x00FEBFCFF4 (CORESIGHT_R5_ETM_0) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000090 |
Description | Component ID Register 1 |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
CLASS | 7:4 | roRead-only | 0x9 | Component class: 0x9 = debug component. |
PRMBL_1 | 3:0 | roRead-only | 0x0 | Preamble. |