Zynq UltraScale+ Devices Register Reference > Module Summary > SERDES Module > L0_PLL_SS_STEPS_1_MSB (SERDES) Register

L0_PLL_SS_STEPS_1_MSB (SERDES) Register

L0_PLL_SS_STEPS_1_MSB (SERDES) Register Description

Register NameL0_PLL_SS_STEPS_1_MSB
Relative Address0x000000236C
Absolute Address 0x00FD40236C (SERDES)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionRegister value is generated by Vivado PCW.

L0_PLL_SS_STEPS_1_MSB (SERDES) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PLL_SS_STEPS_1_MSB_31_8_rsvd31:8roRead-only0x0Value generated by PCW.
ss_num_of_steps_1_msb_rsvd 7:3roRead-only0x0Value generated by PCW.
ss_num_of_steps_1_msb 2:0rwNormal read/write0x0Value generated by PCW.