Zynq UltraScale+ Devices Register Reference > Module Summary > LPD_SLCR_SECURE Module > isr (LPD_SLCR_SECURE) Register

isr (LPD_SLCR_SECURE) Register

isr (LPD_SLCR_SECURE) Register Description

Register Nameisr
Relative Address0x0000000008
Absolute Address 0x00FF4B0008 (LPD_SLCR_SECURE)
Width 1
TypewtcReadable, write a 1 to clear
Reset Value0x00000000
DescriptionInterrupt Status Register

Sticky register that holds the value of the interrupt until cleared by writing a value of 1.

isr (LPD_SLCR_SECURE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
addr_decode_err 0wtcReadable, write a 1 to clear0x0Status for an address decode error.
Reads:
0: No Event.
1: Event Occurred.
Writes:
0: ignored.
1: clear bit.