Zynq UltraScale+ Devices Register Reference > Module Summary > VCU_SLCR Module > VCU_ENC_CACHE_AXI_PROT (VCU_SLCR) Register

VCU_ENC_CACHE_AXI_PROT (VCU_SLCR) Register

VCU_ENC_CACHE_AXI_PROT (VCU_SLCR) Register Description

Register NameVCU_ENC_CACHE_AXI_PROT
Relative Address0x0000000058
Absolute Address 0x00A0040058 (VCU_SLCR)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00002222
DescriptionCaution! The fields in this regsiter must not be changed while the VCU is active and AXI traffic is being produced. It is recommended that this field only change during 'idle/inactive' periods of the VCU

VCU_ENC_CACHE_AXI_PROT (VCU_SLCR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:16razRead as zero0x0reserved
awcache115:12rwNormal read/write0x2AXI Write Cache Port 1
arcache111:8rwNormal read/write0x2AXI Read Cache Port 1
awcache0 7:4rwNormal read/write0x2AXI Write Cache Port 0
arcache0 3:0rwNormal read/write0x2AXI Read Cache Port 0