Zynq UltraScale+ Devices Register Reference > Module Summary > GIC400 Module > GICD_PIDR3 (GIC400) Register

GICD_PIDR3 (GIC400) Register

GICD_PIDR3 (GIC400) Register Description

Register NameGICD_PIDR3
Relative Address0x0000010FEC
Absolute Address 0x00F9010FEC (ACPU_GIC)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionPeripheral ID3 Register

GICD_PIDR3 (GIC400) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:0roRead-only0x0Refer to the Arm Generic Interrupt Controller Architecture Specification 2.0 for a detailed register descriptions.