Zynq UltraScale+ Devices Register Reference > Module Summary > DISPLAY_PORT Module > AUD_CH_STATUS_REG5 (DISPLAY_PORT) Register

AUD_CH_STATUS_REG5 (DISPLAY_PORT) Register

AUD_CH_STATUS_REG5 (DISPLAY_PORT) Register Description

Register NameAUD_CH_STATUS_REG5
Relative Address0x000000C01C
Absolute Address 0x00FD4AC01C (DISPLAY_PORT)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionAUD_CH_STATUS_REG5: Audio Channel status bits 191 to 160

AUD_CH_STATUS_REG5 (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
STATUS531:0rwNormal read/write0x0-