Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_DBGRPTRTCU (SMMU500) Register

SMMU_DBGRPTRTCU (SMMU500) Register

SMMU_DBGRPTRTCU (SMMU500) Register Description

Register NameSMMU_DBGRPTRTCU
Relative Address0x0000000088
Absolute Address 0x00FD800088 (SMMU_GPV)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionAddress of an entry from a specific cache in TCU.

SMMU_DBGRPTRTCU (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
DATASRC27:26rwNormal read/write0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
WAY_RAM25:24rwNormal read/write0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
TLB_Pointer12:4rwNormal read/write0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
TLB_Entry_Pointer 3:0rwNormal read/write0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details