Zynq UltraScale+ Devices Register Reference > Module Summary > GEM Module > dma_rxbuf_size_q1 (GEM) Register

dma_rxbuf_size_q1 (GEM) Register

dma_rxbuf_size_q1 (GEM) Register Description

Register Namedma_rxbuf_size_q1
Relative Address0x00000004A0
Absolute Address 0x00FF0B04A0 (GEM0)
0x00FF0C04A0 (GEM1)
0x00FF0D04A0 (GEM2)
0x00FF0E04A0 (GEM3)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000002
DescriptionReceive Buffer Queue Size

dma_rxbuf_size_q1 (GEM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:8roRead-only0x0Reserved, read as 0, ignored on write.
dma_rx_q_buf_size 7:0rwNormal read/write0x2DMA receive buffer size in system memory. The value defined by these bits determines the size of buffer to use in main system memory when writing received data. The value is defined in multiples of 64 bytes.0x01 corresponds to buffers of 64 bytes.0x02 corresponds to 128 bytes etc.For example:0x02: 128 byte0x18: 1536 byte (1*max length frame/buffer)0xA0: 10240 byte (1*10K jumbo frame/buffer)Note that this value should never be written as zero.Note. The reset value of this field is equal to the
gem_rx_buffer_length_def define, which is user configurable.