Zynq UltraScale+ Devices Register Reference > Module Summary > A53_PMU_2 Module > DEVAFF1 (A53_PMU_2) Register

DEVAFF1 (A53_PMU_2) Register

DEVAFF1 (A53_PMU_2) Register Description

Register NameDEVAFF1
Relative Address0x0000000FAC
Absolute Address 0x00FEE30FAC (CORESIGHT_A53_PMU_2)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionPerformance Monitors Device Affinity Register 1

DEVAFF1 (A53_PMU_2) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PMDEVAFF131:0roRead-only0MPIDR_EL1 high half. Read-only copy of the high half of MPIDR_EL1, as seen from the highest implemented exception level.