Zynq UltraScale+ Devices Register Reference > Module Summary > PCIE_ATTRIB Module > ATTR_50 (PCIE_ATTRIB) Register

ATTR_50 (PCIE_ATTRIB) Register

ATTR_50 (PCIE_ATTRIB) Register Description

Register NameATTR_50
Relative Address0x00000000C8
Absolute Address 0x00FD4800C8 (PCIE_ATTRIB)
Width32
TyperwNormal read/write
Reset Value0x00009C02
DescriptionATTR_50

This register should only be written to during reset of the PCIe block

ATTR_50 (PCIE_ATTRIB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr_pcie_cap_nextptr15:8rwNormal read/write0x9CPCIe Capabilitys Next Capability Offset pointer to the next item in the capabilities list, or 00h if this is the final capability.
attr_pcie_cap_device_port_type 7:4rwNormal read/write0x0Identifies the type of device/port as follows:
0000b PCI Express Endpoint device, 0001b Legacy PCI Express Endpoint device, 0100b Root Port of PCI Express Root Complex, 0101b Upstream Port of PCI Express Switch, 0110b Downstream Port of PCI Express Switch, 0111b PCIE Express to PCI/PCI-X Bridge, 1000b PCI/PCI-X to PCI Express Bridge.
Transferred to PCI Express Capabilities register.
Must be consistent with IS_SWITCH and UPSTREAM_FACING settings.
attr_pcie_cap_capability_version 3:0rwNormal read/write0x2Indicates PCI-SIG defined PCI Express capability structure version number.