Zynq UltraScale+ Devices Register Reference > Module Summary > USB3_XHCI Module > SUPTPRT2_DW2 (USB3_XHCI) Register

SUPTPRT2_DW2 (USB3_XHCI) Register

SUPTPRT2_DW2 (USB3_XHCI) Register Description

Register NameSUPTPRT2_DW2
Relative Address0x00000008F8
Absolute Address 0x00FE2008F8 (USB3_0_XHCI)
0x00FE3008F8 (USB3_1_XHCI)
Width32
TyperoRead-only
Reset Value0x00080201
DescriptionxHCI Supported Protocol Capability_ Data Word 2
For a description of other register fields, see section 7.2 of the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.0.

SUPTPRT2_DW2 (USB3_XHCI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PSIC31:28roRead-only0x0PSIC
MHD27:25roRead-only0x0Hub Depth
For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.0.
BLC20roRead-only0x0BESL LPM Capability.
When this bit is set to:
- 1: The ports described by this xHCI Supported Protocol Capability applies BESL timing to the BESL and BESLD fields of the PORTPMSC and PORTHLPMC registers.
- 0: The ports described by this xHCI Supported Protocol Capability applies HIRD timing to the BESL and BESLD fields of the PORTPMSC and PORTHLPMC registers.
HLC19roRead-only0x1Compatible Port Offset.
Compatible Port Count
IHI18roRead-only0x0IHI
HSO17roRead-only0x0HSO
COMPATIBLE_PORT_COUNT15:8roRead-only0x2COMPATIBLE_PORT_COUNT
For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.0.
COMPATIBLE_PORT_OFFSET 7:0roRead-only0x1COMPATIBLE_PORT_OFFSET
For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.0.