Zynq UltraScale+ Devices Register Reference > Module Summary > SIOU Module > IR_ENABLE (SIOU) Register

IR_ENABLE (SIOU) Register

IR_ENABLE (SIOU) Register Description

Register NameIR_ENABLE
Relative Address0x000000000C
Absolute Address 0x00FD3D000C (SIOU)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionInterrupt Enable Register. A write of to this location will unmask the interrupt. (IMR: 0)

IR_ENABLE (SIOU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:1roRead-only0x0Reserved
addr_decode_err 0woWrite-only0x0Enable for an address decode error interrupt.