Zynq UltraScale+ Devices Register Reference > Module Summary > PL390 Module > enable_spi (PL390) Register

enable_spi (PL390) Register

enable_spi (PL390) Register Description

Register Nameenable_spi
Relative Address0x0000000D04
Absolute Address 0x00F9000D04 (RCPU_GIC)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionEach bit provides the status of the SPI[987:0] inputs.

enable_spi (PL390) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
spi_status31:0roRead-only0x0Returns the status of the SPI[987:0] inputs on the Distributor:
Bit [x] = 0 SPI[x] is LOW
Bit [x] = 1 SPI[x] is HIGH.