Zynq UltraScale+ Devices Register Reference > Module Summary > SDIO Module > reg_presetvalue1 (SDIO) Register

reg_presetvalue1 (SDIO) Register

reg_presetvalue1 (SDIO) Register Description

Register Namereg_presetvalue1
Relative Address0x0000000062
Absolute Address 0x00FF160062 (SD0)
0x00FF170062 (SD1)
Width16
TyperoRead-only
Reset Value0x00000004
DescriptionDefault Clock and I/O Drive Preset Values.
Read clock select values and I/O drive.

Read the SD_CLK Frequency Select Value, Clock Generator Select Value, Driver Strength Select Value for Default Speed.

reg_presetvalue1 (SDIO) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
DriverStrengthSelectValue15:14roRead-only0x0Driver Strength is supported by 1.8V signaling bus speed modes.
00: Driver Type B is selected. (default)
01: Driver Type A is selected.
10: Driver Type C is selected.
11: Driver Type D is selected.
This field is meaningless for 3.3V signaling.
ClockGeneratorSelectValue10roRead-only0x0Select clock generator mode.
0: Host Controller Ver2.00 Clock Model.
1: Programmable Clock Generator.
SDCLKFrequencySelectValue 9:0roRead-only0x410-bit preset value used by programmable
clock unit, loaded into the xxx Control register.