Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_DBGRDATATCU (SMMU500) Register
Register Name | SMMU_DBGRDATATCU |
---|---|
Relative Address | 0x000000008C |
Absolute Address | 0x00FD80008C (SMMU_GPV) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | Cache entry data addressed by TCU debug read pointer. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
bits | 31:0 | roRead-only | 0 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |