Zynq UltraScale+ Devices Register Reference > Module Summary > ETR Module > MODE (ETR) Register

MODE (ETR) Register

MODE (ETR) Register Description

Register NameMODE
Relative Address0x0000000028
Absolute Address 0x00FE970028 (CORESIGHT_SOC_ETR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionControls TMC operating mode. When configured as an ETB or ETR, the TMC can operate in the following modes:<ul><li>Software FIFO mode</li><li>Circular Buffer mode.</li></ul> When configured as an ETF, the TMC has an additional mode of operation, Hardware FIFO mode. The operating mode can be changed only when the TMC is disabled. Attempting to write to this register while not in Disabled state (TraceCaptEn=0 and TMCReady=1) results in Unpredictable behavior. The operating mode is ignored when in Disabled state.

MODE (ETR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
MODE 1:0rwNormal read/write0x0Selects the operating mode.