Zynq UltraScale+ Devices Register Reference > Module Summary > LPD_SLCR Module > ERR_ATB_ISR (LPD_SLCR) Register

ERR_ATB_ISR (LPD_SLCR) Register

ERR_ATB_ISR (LPD_SLCR) Register Description

Register NameERR_ATB_ISR
Relative Address0x0000006000
Absolute Address 0x00FF416000 (LPD_SLCR)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionInterrupt Status Register for intrN. This is a sticky register that holds the value of the interrupt until cleared by a value of 1.

ERR_ATB_ISR (LPD_SLCR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:2razRead as zero0x0reserved for future use
afifs2 1wtcReadable, write a 1 to clear0x0ISR for ATB placed between lpd interconnect and afifs2
lpdm 0wtcReadable, write a 1 to clear0x0ISR for ATB placed between lpd inbound switch and lpd main switch (trans. going to Slave in LPD including IOU)