Zynq UltraScale+ Devices Register Reference > Module Summary > CSU Module > aes_reset (CSU) Register

aes_reset (CSU) Register

aes_reset (CSU) Register Description

Register Nameaes_reset
Relative Address0x0000001010
Absolute Address 0x00FFCA1010 (CSU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionAES Reset

aes_reset (CSU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
reset 0rwNormal read/write0x0Setting this bit resets the AES. The AES will remain in reset until this bit is unset.