Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_DBGRDATATBU (SMMU500) Register

SMMU_DBGRDATATBU (SMMU500) Register

SMMU_DBGRDATATBU (SMMU500) Register Description

Register NameSMMU_DBGRDATATBU
Relative Address0x0000000084
Absolute Address 0x00FD800084 (SMMU_GPV)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionTLB entry data addressed by TBU debug read pointer.

SMMU_DBGRDATATBU (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
bits31:0roRead-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details