Zynq UltraScale+ Devices Register Reference > Module Summary > USB3_XHCI Module > GDBGLSP (USB3_XHCI) Register

GDBGLSP (USB3_XHCI) Register

GDBGLSP (USB3_XHCI) Register Description

Register NameGDBGLSP
Relative Address0x000000C174
Absolute Address 0x00FE20C174 (USB3_0_XHCI)
0x00FE30C174 (USB3_1_XHCI)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionGlobal Debug LSP Register
This register is for internal debug purposes only.
This register is for internal use only.
If DWC_USB3_PRESERVE_LOGIC_ANALYZER_SELECT is enabled during core configuration, then the default values readout is X (Undefined).
Bit Bash test should not be done on this debug register.

GDBGLSP (USB3_XHCI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
LSPDEBUG31:0roRead-only0x0LSP Debug Information