Zynq UltraScale+ Devices Register Reference > Module Summary > PLSYSMON Module > SEQ_CHANNEL2 (PLSYSMON) Register

SEQ_CHANNEL2 (PLSYSMON) Register

SEQ_CHANNEL2 (PLSYSMON) Register Description

Register NameSEQ_CHANNEL2
Relative Address0x0000000118
Absolute Address 0x00FFA50D18 (AMS_PL_SYSMON)
Width16
TyperwNormal read/write
Reset Value0x00000000
DescriptionSequencer Channel Inclusion, Group 2.

Include or exclude channels in the auto-sequencing routine. 0: exclude channel. 1: include channel. Note: UG580 refers to this register as SEQCHSEL0.

SEQ_CHANNEL2 (PLSYSMON) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved15:6rwNormal read/write0x0reserved.
Reserved 5rwNormal read/write0x0reserved.
vccams 4rwNormal read/write0x0VCC_PL_ADC (VCCADC).
supply10 3rwNormal read/write0x0VUser3.
supply9 2rwNormal read/write0x0VUser2.
supply8 1rwNormal read/write0x0VUser1.
supply7 0rwNormal read/write0x0VUser0.