Zynq UltraScale+ Devices Register Reference > Module Summary > DDR_PHY Module > MR7 (DDR_PHY) Register

MR7 (DDR_PHY) Register

MR7 (DDR_PHY) Register Description

Register NameMR7
Relative Address0x000000019C
Absolute Address 0x00FD08019C (DDR_PHY)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionLPDDR4 Mode Register 7

MR7 (DDR_PHY) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:8roRead-only0x0Reserved. Return zeroes on reads.
RSVD 7:0rwNormal read/write0x0These are JEDEC reserved bits and are recommended by JEDEC to be programmed to 0x0.

Alternate Register MR7_DDR3, reset=0x0
Alternate Register Field: RSVD Offset=0 Width=16 read-write
[[*]] Description: These are JEDEC reserved bits and are recommended by JEDEC to be programmed to 0x0.
Alternate Register Field: RESERVED_31_16 Offset=16 Width=16 read-only
[[*]] Description: Reserved. Return zeroes on reads.
Alternate Register Field: RSVD_15_0 Offset=0 Width=16 read-write
[[*]] Description: Reserve for future use.
Alternate Register Field: RESERVED_31_16 Offset=16 Width=16 read-only
[[*]] Description: Reserved. Return zeroes on reads.
Alternate Register Field: RSVD Offset=0 Width=16 read-write
[[*]] Description: These are JEDEC reserved bits and are recommended by JEDEC to be programmed to 0x0.
Alternate Register Field: RESERVED_31_16 Offset=16 Width=16 read-only
[[*]] Description: Reserved. Return zeroes on reads.
Alternate Register Field: RSVD Offset=0 Width=16 read-write
[[*]] Description: These are JEDEC reserved bits and are recommended by JEDEC to be programmed to 0x0.
Alternate Register Field: RESERVED_31_16 Offset=16 Width=16 read-only
[[*]] Description: Reserved. Return zeroes on reads.