Zynq UltraScale+ Devices Register Reference > Module Summary > PL390 Module > enable_spi (PL390) Register
Register Name | enable_spi |
---|---|
Relative Address | 0x0000000D04 |
Absolute Address | 0x00F9000D04 (RCPU_GIC) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | Each bit provides the status of the SPI[987:0] inputs. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
spi_status | 31:0 | roRead-only | 0x0 | Returns the status of the SPI[987:0] inputs on the Distributor: Bit [x] = 0 SPI[x] is LOW Bit [x] = 1 SPI[x] is HIGH. |