Zynq UltraScale+ Devices Register Reference > Module Summary > GPU Module > PP1_REND_RSW_BASE (GPU) Register

PP1_REND_RSW_BASE (GPU) Register

PP1_REND_RSW_BASE (GPU) Register Description

Register NamePP1_REND_RSW_BASE
Relative Address0x000000A004
Absolute Address 0x00FD4BA004 (GPU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionRenderer State Word Base Address Register

PP1_REND_RSW_BASE (GPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
REND_RSW_BASE31:6rwNormal read/write0x0Default renderer state word base address
_ 5:0rwNormal read/write0x0Reserved, write as zero, read undefined