Zynq UltraScale+ Devices Register Reference > Module Summary > CSU Module > pcap_reset (CSU) Register

pcap_reset (CSU) Register

pcap_reset (CSU) Register Description

Register Namepcap_reset
Relative Address0x000000300C
Absolute Address 0x00FFCA300C (CSU)
Width32
TyperwNormal read/write
Reset Value0x00000001
DescriptionPCAP Reset

pcap_reset (CSU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
reset 0rwNormal read/write0x1Reset for the PCAP, including the RD/WR FIFO. The PCAP remains in reset until this bit is set low.