Zynq UltraScale+ Devices Register Reference > Module Summary > FUNNEL4P Module > PIDR2 (FUNNEL4P) Register
Register Name | PIDR2 |
---|---|
Relative Address | 0x0000000FE8 |
Absolute Address |
0x00FE920FE8 (CORESIGHT_SOC_FUNN_1) 0x00FE930FE8 (CORESIGHT_SOC_FUNN_2) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x0000002B |
Description | Part of the set of Peripheral Identification registers. Contains part of the designer identity and the product revision. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Revision | 7:4 | roRead-only | 0x2 | The Revision field is an incremental value starting at 0x0 for the first design of this component. This only increases by 1 for both major and minor revisions and is simply used as a look-up to establish the exact major/minor revision. |
JEDEC | 3 | roRead-only | 0x1 | Always set. Indicates that a JEDEC assigned value is used |
JEP106_bits6to4 | 2:0 | roRead-only | 0x3 | Bits 6:4 of the JEDEC identity code indicating the designer of the component (along with the continuation code) |