Zynq UltraScale+ Devices Register Reference > Module Summary > A53_ETM_2 Module > EXTINSELR (A53_ETM_2) Register

EXTINSELR (A53_ETM_2) Register

EXTINSELR (A53_ETM_2) Register Description

Register NameEXTINSELR
Relative Address0x0000000120
Absolute Address 0x00FEE40120 (CORESIGHT_A53_ETM_2)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionExternal Input Select Register

EXTINSELR (A53_ETM_2) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
SEL328:24rwNormal read/write0x0Selects an event from the external input bus for External Input Resource 3.
SEL220:16rwNormal read/write0x0Selects an event from the external input bus for External Input Resource 2.
SEL112:8rwNormal read/write0x0Selects an event from the external input bus for External Input Resource 1.
SEL0 4:0rwNormal read/write0x0Selects an event from the external input bus for External Input Resource 0.