Zynq UltraScale+ Devices Register Reference > Module Summary > DDR_PHY Module > DX1RSR3 (DDR_PHY) Register
Register Name | DX1RSR3 |
---|---|
Relative Address | 0x00000008DC |
Absolute Address | 0x00FD0808DC (DDR_PHY) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | DATX8 n Rank Status Register 3 |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:16 | roRead-only | 0x0 | Reserved. Return zeroes on reads. |
WLAERR | 15:0 | roRead-only | 0x0 | Write Latency Adjustment error: Indicates, for each of the system ranks, that an error occurred in the WLA algorithm. This is for the byte in x8 mode |