Zynq UltraScale+ Devices Register Reference > Module Summary > PCIE_ATTRIB Module > ATTR_102 (PCIE_ATTRIB) Register

ATTR_102 (PCIE_ATTRIB) Register

ATTR_102 (PCIE_ATTRIB) Register Description

Register NameATTR_102
Relative Address0x0000000198
Absolute Address 0x00FD480198 (PCIE_ATTRIB)
Width32
TyperwNormal read/write
Reset Value0x00008008
DescriptionATTR_102

This register should only be written to during reset of the PCIe block

ATTR_102 (PCIE_ATTRIB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved15:14rwNormal read/write0x2reserved.
Reserved13rwNormal read/write0x0reserved.
Reserved12rwNormal read/write0x0reserved.
Reserved11rwNormal read/write0x0reserved.
Reserved10rwNormal read/write0x0reserved.
Reserved 9rwNormal read/write0x0reserved.
Reserved 8rwNormal read/write0x0reserved.
Reserved 7rwNormal read/write0x0reserved.
Reserved 6rwNormal read/write0x0reserved.
Reserved 5rwNormal read/write0x0reserved.
Reserved 4rwNormal read/write0x0reserved.
Reserved 3:2rwNormal read/write0x2reserved.
Reserved 1rwNormal read/write0x0reserved.
attr_enable_rx_td_ecrc_trim 0rwNormal read/write0x0If enabled, received TLPs have their td bit set to 0 and the ECRC is removed