Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_PIDR4 (SMMU500) Register

SMMU_PIDR4 (SMMU500) Register

SMMU_PIDR4 (SMMU500) Register Description

Register NameSMMU_PIDR4
Relative Address0x0000000FD0
Absolute Address 0x00FD800FD0 (SMMU_GPV)
Width32
TyperoRead-only
Reset Value0x00000004
DescriptionPeripheral Identificaation register 4

SMMU_PIDR4 (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
FourKB_Count 7:4roRead-only0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
JEP106_Continuation_code 3:0roRead-only0x4Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details