Zynq UltraScale+ Devices Register Reference > Module Summary > DDRC Module > PCFGWQOS1_0 (DDRC) Register
Register Name | PCFGWQOS1_0 |
---|---|
Relative Address | 0x00000004A0 |
Absolute Address | 0x00FD0704A0 (DDRC) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Port 0 Write QoS Configuration Register 1 |
This register is quasi-dynamic group 3. Group 3 registers can only be written when the controller is empty.
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
wqos_map_timeout | 10:0 | rwNormal read/write | 0x0 | Specifies the timeout value for write transactions. |