Zynq UltraScale+ Devices Register Reference > Module Summary > TPIU Module > CIDR0 (TPIU) Register

CIDR0 (TPIU) Register

CIDR0 (TPIU) Register Description

Register NameCIDR0
Relative Address0x0000000FF0
Absolute Address 0x00FE980FF0 (CORESIGHT_SOC_TPIU)
Width32
TyperoRead-only
Reset Value0x0000000D
DescriptionA component identification register, that indicates that the identification registers are present.

CIDR0 (TPIU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PRMBL_0 7:0roRead-only0xDContains bits [7:0] of the component identification