Zynq UltraScale+ Devices Register Reference > Module Summary > OCM Module > OCM_IMR (OCM) Register

OCM_IMR (OCM) Register

OCM_IMR (OCM) Register Description

Register NameOCM_IMR
Relative Address0x0000000008
Absolute Address 0x00FF960008 (OCM)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x000007FF
DescriptionInterrupt Mask Register for intrN. This is a read-only location and can be atomically altered by either the IDR or the IER.

OCM_IMR (OCM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:11razRead as zero0x0Status for an address decode error interrupt.
UE_RMW10roRead-only0x1see OCM_INT_STATUS register for details
FIX_BURST_WR 9roRead-only0x1see OCM_INT_STATUS register for details
FIX_BURST_RD 8roRead-only0x1see OCM_INT_STATUS register for details
ECC_UE 7roRead-only0x1see OCM_INT_STATUS register for details
ECC_CE 6roRead-only0x1see OCM_INT_STATUS register for details
LOCK_ERR_WR 5roRead-only0x1see OCM_INT_STATUS register for details
LOCK_ERR_RD 4roRead-only0x1see OCM_INT_STATUS register for details
INV_OCM_WR 3roRead-only0x1see OCM_INT_STATUS register for details
INV_OCM_RD 2roRead-only0x1see OCM_INT_STATUS register for details
PWR_DWN 1roRead-only0x1see OCM_INT_STATUS register for details
INV_APB 0roRead-only0x1see OCM_INT_STATUS register for details