Zynq UltraScale+ Devices Register Reference > Module Summary > DISPLAY_PORT Module > AV_BUF_SRST_REG (DISPLAY_PORT) Register

AV_BUF_SRST_REG (DISPLAY_PORT) Register

AV_BUF_SRST_REG (DISPLAY_PORT) Register Description

Register NameAV_BUF_SRST_REG
Relative Address0x000000B124
Absolute Address 0x00FD4AB124 (DISPLAY_PORT)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionAV_BUF_SRST_REG

AV_BUF_SRST_REG (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:2razRead as zero0x0
VID_RST 1rwNormal read/write0x0Bits1
-
- =1 to assert Video pipe soft reset
- = 0 to deassert
Reserved 0razRead as zero0x0