Zynq UltraScale+ Devices Register Reference > Module Summary > PMU_IOMODULE Module > PIT0_PRELOAD (PMU_IOMODULE) Register

PIT0_PRELOAD (PMU_IOMODULE) Register

PIT0_PRELOAD (PMU_IOMODULE) Register Description

Register NamePIT0_PRELOAD
Relative Address0x0000000040
Absolute Address 0x00FFD40040 (PMU_IOMODULE)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionPIT0 Preload Register

The value written to this register determines the period between two consecutive PIT0_Interrupt events. The period is the value written to the register + 2 count events.

PIT0_PRELOAD (PMU_IOMODULE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PIT0_PRELOAD31:0roRead-only0x0Register holds the timer period