Zynq UltraScale+ Devices Register Reference > Module Summary > R5_DBG_1 Module > VCR (R5_DBG_1) Register

VCR (R5_DBG_1) Register

VCR (R5_DBG_1) Register Description

Register NameVCR
Relative Address0x000000001C
Absolute Address 0x00FEBF201C (CORESIGHT_R5_DBG_1)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionVector Catch Register

VCR (R5_DBG_1) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
FIQ 7rwNormal read/write0Vector catch enable, FIQ.
IRQ 6rwNormal read/write0Vector catch enable, IRQ.
Data_Abort 4rwNormal read/write0Vector catch enable, data abort.
Prefetch_Abort 3rwNormal read/write0Vector catch enable, prefetch abort.
SVC 2rwNormal read/write0Vector catch enable, SVC.
Undefined 1rwNormal read/write0Vector catch enable, Undefined Instruction.
Reset 0rwNormal read/write0Vector catch enable, reset.