Zynq UltraScale+ Devices Register Reference > Module Summary > VCU_SLCR Module > VCU_ENC_CACHE_AXI_PROT (VCU_SLCR) Register
Register Name | VCU_ENC_CACHE_AXI_PROT |
---|---|
Relative Address | 0x0000000058 |
Absolute Address | 0x00A0040058 (VCU_SLCR) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00002222 |
Description | Caution! The fields in this regsiter must not be changed while the VCU is active and AXI traffic is being produced. It is recommended that this field only change during 'idle/inactive' periods of the VCU |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:16 | razRead as zero | 0x0 | reserved |
awcache1 | 15:12 | rwNormal read/write | 0x2 | AXI Write Cache Port 1 |
arcache1 | 11:8 | rwNormal read/write | 0x2 | AXI Read Cache Port 1 |
awcache0 | 7:4 | rwNormal read/write | 0x2 | AXI Write Cache Port 0 |
arcache0 | 3:0 | rwNormal read/write | 0x2 | AXI Read Cache Port 0 |