Zynq UltraScale+ Devices Register Reference > Module Summary > PMU_GLOBAL Module > APU_PWR_STATUS_INIT (PMU_GLOBAL) Register

APU_PWR_STATUS_INIT (PMU_GLOBAL) Register

APU_PWR_STATUS_INIT (PMU_GLOBAL) Register Description

Register NameAPU_PWR_STATUS_INIT
Relative Address0x0000000008
Absolute Address 0x00FFD80008 (PMU_GLOBAL)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionAPU Power Initialization Status.

Provides a location in the PMU to hold the initialization value for CPUPWRDWNREQ field of the APU PWRCTL register during an FPD power-down. The bit associated with an ACPU is loaded by the PMU ROM code in the CPUPWRDWNREQ field of the PWRCTL register right after the routine releases the reset to the ACPU core after an FP-domain power up. 0 = Normal Cold Reset (Default) 1 = Reset after a Power up after Shutdown Mode.

APU_PWR_STATUS_INIT (PMU_GLOBAL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:4roRead-only0x0reserved
ACPU3 3rwNormal read/write0x0APU3
power cycle process.
ACPU2 2rwNormal read/write0x0APU2 power cycle process.
ACPU1 1rwNormal read/write0x0APU1 power cycle process.
ACPU0 0rwNormal read/write0x0APU0 power cycle process.