Zynq UltraScale+ Devices Register Reference > Module Summary > USB3_REGS Module > pwr_config_usb2 (USB3_REGS) Register
Register Name | pwr_config_usb2 |
---|---|
Relative Address | 0x000000004C |
Absolute Address |
0x00FF9D004C (USB3_0) 0x00FF9E004C (USB3_1) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | USB2 PHY power config |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:30 | razRead as zero | 0x0 | reserved for future |
strap | 29:0 | rwNormal read/write | 0x0 | This is an array of fixed values that indicates which PHY signal may be used to detect connect/disconnect when the core is acting as a device |