Zynq UltraScale+ Devices Register Reference > Module Summary > A53_ROM Module > ENTRY12 (A53_ROM) Register

ENTRY12 (A53_ROM) Register

ENTRY12 (A53_ROM) Register Description

Register NameENTRY12
Relative Address0x0000000030
Absolute Address 0x00FEC00030 (CORESIGHT_A53_ROM)
Width32
TyperoRead-only
Reset Value0x00310003
DescriptionCPU 3 Debug Component

ENTRY12 (A53_ROM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:0roRead-only0x310003-