Zynq UltraScale+ Devices Register Reference > Module Summary > A53_ETM_2 Module > CIDR1 (A53_ETM_2) Register

CIDR1 (A53_ETM_2) Register

CIDR1 (A53_ETM_2) Register Description

Register NameCIDR1
Relative Address0x0000000FF4
Absolute Address 0x00FEE40FF4 (CORESIGHT_A53_ETM_2)
Width32
TyperoRead-only
Reset Value0x00000090
DescriptionComponent Identification Register 1

CIDR1 (A53_ETM_2) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
CLASS 7:4roRead-only0x9Component class. Reads as 0x9, to indicate that the ETM is a debug component, with CoreSight architecture compliant management registers.
PRMBL_1 3:0roRead-only0x0Preamble. Must read as 0x0.