Zynq UltraScale+ Devices Register Reference > Module Summary > RTC Module > ADDR_ERROR_INT_DIS (RTC) Register
Register Name | ADDR_ERROR_INT_DIS |
---|---|
Relative Address | 0x000000003C |
Absolute Address | 0x00FFA6003C (RTC) |
Width | 1 |
Type | woWrite-only |
Reset Value | 0x00000000 |
Description | Address Decode Error Interrupt Disable. |
A write to the register bit will mask the Address Decode Error interrupt. 0: ignored. 1: set the ADDR_ERROR_INT_MASK = 1.
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Mask | 0 | woWrite-only | 0x0 | Mask for an address decode error interrupt |