Zynq UltraScale+ Devices Register Reference > Module Summary > DISPLAY_PORT Module > DP_TX_AUDIO_EXT_DATA0 (DISPLAY_PORT) Register

DP_TX_AUDIO_EXT_DATA0 (DISPLAY_PORT) Register

DP_TX_AUDIO_EXT_DATA0 (DISPLAY_PORT) Register Description

Register NameDP_TX_AUDIO_EXT_DATA0
Relative Address0x0000000330
Absolute Address 0x00FD4A0330 (DISPLAY_PORT)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionWord formatted as per Extension packet described in protocol specification. Extended packet is fixed to 32 Bytes length. The controller has buffer space for only one extended packet.

DP_TX_AUDIO_EXT_DATA0 (DISPLAY_PORT) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
DATA31:0woWrite-only0x0A total of nine words should be written in following order:
-
1st word -
o [7:0] = HB0
o [15:8] = HB1
o [23:16] = HB2
o [31:24] = HB3