Zynq UltraScale+ Devices Register Reference > Module Summary > PLSYSMON Module > SEQ_CHANNEL0 (PLSYSMON) Register
Register Name | SEQ_CHANNEL0 |
---|---|
Relative Address | 0x0000000120 |
Absolute Address | 0x00FFA50D20 (AMS_PL_SYSMON) |
Width | 16 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Sequencer Channel Inclusion, Group 0. |
Include or exclude channels in the auto-sequencing routine. 0: exclude channel. 1: include channel. Note: UG580 refers to this register as SEQCHSEL1.
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
current_mon | 15 | rwNormal read/write | 0x0 | reserved |
vccbram | 14 | rwNormal read/write | 0x0 | PL Block RAM Voltage sensor, VCCBRAM. Full-featured channel (supply3). |
vrefn | 13 | rwNormal read/write | 0x0 | VRefN. Basic channel. |
vrefp | 12 | rwNormal read/write | 0x0 | VRefP. Basic channel. |
vp_vn | 11 | rwNormal read/write | 0x0 | VP_VN. Basic channel. |
vccaux | 10 | rwNormal read/write | 0x0 | PL Auxiliary Voltage sensor, VCCAUX. Full-featured channel (supply2). |
vccint | 9 | rwNormal read/write | 0x0 | PL Internal Voltage sensor, VCCINT. Full-featured channel (supply1). |
temperature | 8 | rwNormal read/write | 0x0 | PL temperature sensor, Temp_PL. Full-featured channel. |
vcc_psaux | 7 | rwNormal read/write | 0x0 | VCC_PSAux. Full-featured channel. |
vcc_psintfp | 6 | rwNormal read/write | 0x0 | FPD Voltage sensor, VCC_PSINTFP. Full-featured channel (supply5). |
vcc_psintlp | 5 | rwNormal read/write | 0x0 | LPD Voltage sensor, VCC_PSINTLP. Full-featured channel (supply4). |
Reserved | 4 | rwNormal read/write | 0x0 | reserved. |
Reserved | 3 | rwNormal read/write | 0x0 | reserved. |
Reserved | 2 | rwNormal read/write | 0x0 | reserved. |
Reserved | 1 | rwNormal read/write | 0x0 | reserved. |
calibration | 0 | rwNormal read/write | 0x0 | Reserved, calibration is automatically performed at a slow sequence rate. |