Zynq UltraScale+ Devices Register Reference > Module Summary > GPU Module > PP0_WB0_MRT_OFFSET (GPU) Register
Register Name | PP0_WB0_MRT_OFFSET |
---|---|
Relative Address | 0x0000008120 |
Absolute Address | 0x00FD4B8120 (GPU) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | WB0 MRT Offset Register |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
WB0_MRT_OFFSET | 31:3 | rwNormal read/write | 0x0 | Offset value giving the distance in memory between each MRT |
_ | 2:0 | rwNormal read/write | 0x0 | Reserved, write as zero, read undefined. |