Zynq UltraScale+ Devices Register Reference > Module Summary > QSPI Module > IER (QSPI) Register

IER (QSPI) Register

IER (QSPI) Register Description

Register NameIER
Relative Address0x0000000008
Absolute Address 0x00FF0F0008 (QSPI)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionInterrupt Enable

Writing a 1 to this register clears the corresponding bits of the interrupt mask register. 0: no effect. 1: enable the interrupt (unmask = 1).

IER (QSPI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:9roRead-only0x0reserved
TXFIFO_EMPTY 8woWrite-only0x0TX FIFO Empty interrupt enable
Reserved 7woWrite-only0x0reserved
TX_FIFO_underflow 6woWrite-only0x0TX FIFO underflow
enable
RX_FIFO_full 5woWrite-only0x0RX FIFO full
enable
RX_FIFO_not_empty 4woWrite-only0x0RX FIFO not empty
enable
TX_FIFO_full 3woWrite-only0x0TX FIFO full
enable
TX_FIFO_not_full 2woWrite-only0x0TX FIFO not full
enable
Reserved 1woWrite-only0x0reserved
RX_OVERFLOW 0woWrite-only0x0Receive Overflow interrupt enable: