Zynq UltraScale+ Devices Register Reference > Module Summary > GPU Module > PP1_WB1_TARGET_ADDR (GPU) Register

PP1_WB1_TARGET_ADDR (GPU) Register

PP1_WB1_TARGET_ADDR (GPU) Register Description

Register NamePP1_WB1_TARGET_ADDR
Relative Address0x000000A204
Absolute Address 0x00FD4BA204 (GPU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionWB1 Target Address Register

PP1_WB1_TARGET_ADDR (GPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
WB1_TARGET_ADDR31:3rwNormal read/write0x0The start address in memory of the target buffer
Reserved 2:0rwNormal read/write0x0Reserved, write as zero, read undefined.