Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_CB2_TLBSTATUS (SMMU500) Register

SMMU_CB2_TLBSTATUS (SMMU500) Register

SMMU_CB2_TLBSTATUS (SMMU500) Register Description

Register NameSMMU_CB2_TLBSTATUS
Relative Address0x00000127F4
Absolute Address 0x00FD8127F4 (SMMU_GPV)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionIndicates the status of any TLB maintenance operations issued before the most recent SMMU_CBn_TLBSYNC operation

SMMU_CB2_TLBSTATUS (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
SACTIVE 0roRead-only0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details