Zynq UltraScale+ Devices Register Reference > Module Summary > A53_PMU_2 Module > LSR (A53_PMU_2) Register

LSR (A53_PMU_2) Register

LSR (A53_PMU_2) Register Description

Register NameLSR
Relative Address0x0000000FB4
Absolute Address 0x00FEE30FB4 (CORESIGHT_A53_PMU_2)
Width32
TyperoRead-only
Reset Value0x00000003
DescriptionPerformance Monitors Lock Status Register

LSR (A53_PMU_2) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
nTT 2roRead-only0x0Not thirty-two bit access required. RAZ.
SLK 1roRead-only0x1Software lock status for this component.
SLI 0roRead-only0x1Software lock implemented.