Zynq UltraScale+ Devices Register Reference > Module Summary > GEM Module > tx_lpi_time (GEM) Register

tx_lpi_time (GEM) Register

tx_lpi_time (GEM) Register Description

Register Nametx_lpi_time
Relative Address0x000000027C
Absolute Address 0x00FF0B027C (GEM0)
0x00FF0C027C (GEM1)
0x00FF0D027C (GEM2)
0x00FF0E027C (GEM3)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionTransmit LPI time

tx_lpi_time (GEM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:24roRead-only0x0Unused, read zero
lpi_time23:0rwNormal read/write0x0Time in LPI. This register increments once every 16 LPD_LSBUS_CLK clock cycles when the enable LPI transmission bit 20 is set in the transmit control register. Cleared on read.