Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_CB3_FAR_low (SMMU500) Register

SMMU_CB3_FAR_low (SMMU500) Register

SMMU_CB3_FAR_low (SMMU500) Register Description

Register NameSMMU_CB3_FAR_low
Relative Address0x0000013060
Absolute Address 0x00FD813060 (SMMU_GPV)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionHolds the Lower input address bits [31:0] of the memory access that caused a synchronous abort exception.

SMMU_CB3_FAR_low (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
bits31:0rwNormal read/write0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details