Field Name | Bits | Type | Reset Value | Description |
cfg_trn_pending | 3 | roRead-only | 0x0 | If asserted, sets the Transactions Pending bit in the Device Status Register (Device_Status[5]). Note: The user is required to assert this input if the User Application has not received a completion to a request. |
cfg_pm_send_pme_to | 2 | rwNormal read/write | 0x1 | Active-low signal causes core to to send Turn Off Message. When the link responds with a Turn Off Ack, this will be reported on cfg_msg_received_pme_to_ack, and the final transition to L3 Ready will be reported on cfg_pcie_link_state. |
cfg_pm_turnoff_ok | 1 | rwNormal read/write | 0x1 | Active low power turn-off ready signal to notify the endpoint that it is safe for power to be turned off. This input will be sampled during or after the cycle in which cfg_msg_received_pme_to pulses. |
cfg_pm_wake | 0 | rwNormal read/write | 0x1 | One-clock cycle active low pulse to generate and send a Power Management Wake Event (PM_PME) Message TLP to the upstream link partner. |