Zynq UltraScale+ Devices Register Reference > Module Summary > GPIO Module > INT_STAT_3 (GPIO) Register

INT_STAT_3 (GPIO) Register

INT_STAT_3 (GPIO) Register Description

Register NameINT_STAT_3
Relative Address0x00000002D8
Absolute Address 0x00FF0A02D8 (GPIO)
Width32
TypewtcReadable, write a 1 to clear
Reset Value0x00000000
DescriptionInterrupt Status (GPIO Bank3, EMIO Bank0)

This register operates in exactly the same manner as INT_STAT_0, except that it reflects bank3, which corresponds to EMIO[31:0].

INT_STAT_3 (GPIO) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
INT_STATUS_331:0wtcReadable, write a 1 to clear0x0Interrupt status
Upon read:
0: no interrupt
1: interrupt event has occurred
Upon write:
0: no action
1: clear interrupt status bit
Each bit configures the corresponding pin within the 32-bit bank