Zynq UltraScale+ Devices Register Reference > Module Summary > R5_ETM_0 Module > LSR (R5_ETM_0) Register
Register Name | LSR |
---|---|
Relative Address | 0x0000000FB4 |
Absolute Address | 0x00FEBFCFB4 (CORESIGHT_R5_ETM_0) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000003 |
Description | Lock Status Register |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
TT | 2 | roRead-only | 0x0 | Indicates that a 32-bit access is required to write the key to the LAR. |
SLK | 1 | roRead-only | 0x1 | Locked bit: 0 = Writes are permitted; 1 = Writes are ignored. |
SLI | 0 | roRead-only | 0x1 | 0x1 = Software lock implemented. |