Zynq UltraScale+ Devices Register Reference > Module Summary > PL390 Module > enable_legacy_int_n (PL390) Register

enable_legacy_int_n (PL390) Register

enable_legacy_int_n (PL390) Register Description

Register Nameenable_legacy_int_n
Relative Address0x0000000DD4
Absolute Address 0x00F9000DD4 (RCPU_GIC)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionEnables an external AMBA master to access the status of the:
legacy_nirq_c<n> and legacy_nfiq_c<n> inputs for CPU
Interface <n>,
cfgsdisable tie-off signal.

enable_legacy_int_n (PL390) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
cfgsdisable 2roRead-only0x0Returns the status of the cfgsdisable tie-off signal.
legacy_nfiq_if_n 1roRead-only0x0Returns the status of the legacy FIQ input signal for CPU
Interface <n>.
legacy_nirq_if_n 0roRead-only0x0Returns the status of the legacy IRQ input signal for CPU
Interface <n>.