Zynq UltraScale+ Devices Register Reference > Module Summary > GPU Module > PP1_TIEBREAK_MODE (GPU) Register

PP1_TIEBREAK_MODE (GPU) Register

PP1_TIEBREAK_MODE (GPU) Register Description

Register NamePP1_TIEBREAK_MODE
Relative Address0x000000A04C
Absolute Address 0x00FD4BA04C (GPU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionTiebreak mode Register

PP1_TIEBREAK_MODE (GPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:3rwNormal read/write0x0Reserved, write as zero, read undefined.
TIEBREAK_MODE 2:0rwNormal read/write0x0Selects how the rasterizer breaks ties when a polygon edge is at a sample point.