Zynq UltraScale+ Devices Register Reference > Module Summary > I2C Module > Transfer_Size (I2C) Register

Transfer_Size (I2C) Register

Transfer_Size (I2C) Register Description

Register NameTransfer_Size
Relative Address0x0000000014
Absolute Address 0x00FF020014 (I2C0)
0x00FF030014 (I2C1)
Width 8
TyperwNormal read/write
Reset Value0x00000000
DescriptionTransfer Size Register

This registers meaning varies according to the operating mode as follows: * Master transmitter mode: number of data bytes still not transmitted minus one * Master receiver mode: number of data bytes that are still expected to be received * Slave transmitter mode: number of bytes remaining in the FIFO after the master terminates the transfer * Slave receiver mode: number of valid data bytes in the FIFO This register is cleared if CLR_FIFO bit in the control register is set.

Transfer_Size (I2C) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Transfer_Size 7:0rwNormal read/write0x0Transfer Size
0-255