Zynq UltraScale+ Devices Register Reference > Module Summary > LPD_SLCR Module > GICP0_IRQ_TRIGGER (LPD_SLCR) Register

GICP0_IRQ_TRIGGER (LPD_SLCR) Register

GICP0_IRQ_TRIGGER (LPD_SLCR) Register Description

Register NameGICP0_IRQ_TRIGGER
Relative Address0x0000008010
Absolute Address 0x00FF418010 (LPD_SLCR)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionInterrupt Trigger Register. A write of one to this location will set the interrupt status register related to this interrupt.

GICP0_IRQ_TRIGGER (LPD_SLCR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
src3131woWrite-only0x0PL_IPI2: OR of all of IPIs targeted to RPU PL2
src3030woWrite-only0x0PL_IPI1: OR of all of IPIs targeted to RPU PL1
src2929woWrite-only0x0PL_IPI0: OR of all of IPIs targeted to RPU PL0
src2828woWrite-only0x0Clock monitor coming from CRL
src2727woWrite-only0x0RTC Seconds Interrupt
src2626woWrite-only0x0RTC Alarm Interupt
src2525woWrite-only0x0APM_LPD: Ord of all LPD APMs
src2424woWrite-only0x0CAN1 interrupt
src2323woWrite-only0x0CAN0 interrupt
src2222woWrite-only0x0UART1 interrupt
src2121woWrite-only0x0UART0 interrupt
src2020woWrite-only0x0SPI1 interrupt
src1919woWrite-only0x0SPI0 interrupt
src1818woWrite-only0x0I2C1 interrupt
src1717woWrite-only0x0I2C0 interrupt
src1616woWrite-only0x0GPIO interrupt
src1515woWrite-only0x0SPI interrupt
src1414woWrite-only0x0NAND/NOR/SRAM Static Memory Controller Interrupt
src1313woWrite-only0x0RPU CPU1 ECC errors interrupt. All ECC interrupt of CPU1 are combined into this interrup
src1212woWrite-only0x0RPU CPU0 ECC errors interrupt. All ECC interrupt of CPU0 are combined into this interrupt
src1111woWrite-only0x0LPD_APB_INT: ORd of all APB interrupts from LPD
src1010woWrite-only0x0OCM interrupt (error)
src9 9woWrite-only0x0RPU performance monitor
src8 8woWrite-only0x0RPU performance monitor
Reserved 7woWrite-only0x0reserved.
Reserved 6woWrite-only0x0reserved.
Reserved 5woWrite-only0x0reserved.
Reserved 4woWrite-only0x0reserved.
Reserved 3woWrite-only0x0reserved.
Reserved 2woWrite-only0x0reserved.
Reserved 1woWrite-only0x0reserved.
Reserved 0woWrite-only0x0reserved.