Zynq UltraScale+ Devices Register Reference > Module Summary > GPIO Module > INT_STAT_0 (GPIO) Register
Register Name | INT_STAT_0 |
---|---|
Relative Address | 0x0000000218 |
Absolute Address | 0x00FF0A0218 (GPIO) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | Interrupt Status (GPIO Bank0, MIO) |
This registers shows if an interrupt event has occurred or not. Writing a 1 to a bit in this register clears the interrupt status for that bit. Writing a 0 to a bit in this register is ignored. This register controls bank0, which corresponds to MIO[25:0].
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:26 | razRead as zero | 0x0 | Not used, read back as zero |
INT_STATUS_0 | 25:0 | wtcReadable, write a 1 to clear | 0x0 | Interrupt status Upon read: 0: no interrupt 1: interrupt event has occurred Upon write: 0: no action 1: clear interrupt status bit Each bit configures the corresponding pin within the 26-bit bank |