Zynq UltraScale+ Devices Register Reference > Module Summary > DISPLAY_PORT Module > DP_AUX_WRITE_FIFO (DISPLAY_PORT) Register
Register Name | DP_AUX_WRITE_FIFO |
---|---|
Relative Address | 0x0000000104 |
Absolute Address | 0x00FD4A0104 (DISPLAY_PORT) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | . FIFO containing up to 16 bytes of write data for the current AUX channel command |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:8 | razRead as zero | 0x0 | |
AUX_WRITE_FIFO | 7:0 | woWrite-only | 0x0 | AUX Channel byte data. |