Zynq UltraScale+ Devices Register Reference > Module Summary > QSPI Module > GQSPI_P_TIMEOUT (QSPI) Register

GQSPI_P_TIMEOUT (QSPI) Register

GQSPI_P_TIMEOUT (QSPI) Register Description

Register NameGQSPI_P_TIMEOUT
Relative Address0x0000000158
Absolute Address 0x00FF0F0158 (QSPI)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionGQSPI Poll Time out

GQSPI_P_TIMEOUT (QSPI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
VALUE31:0rwNormal read/write0x0Number of Reference Clock cycles to terminate the Poll operation. Interrupt will be provided to indicate that the timer is expired.
Note: Change this value only when controller is not polling.