Zynq UltraScale+ Devices Register Reference > Module Summary > PL390 Module > enable_sgi_pending_clr_if_n (PL390) Register

enable_sgi_pending_clr_if_n (PL390) Register

enable_sgi_pending_clr_if_n (PL390) Register Description

Register Nameenable_sgi_pending_clr_if_n
Relative Address0x0000000280
Absolute Address 0x00F9000280 (RCPU_GIC)
Width16
TyperoRead-only
Reset Value0x00000000
DescriptionPending Clear Register (ICDICPR)

enable_sgi_pending_clr_if_n (PL390) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_15:0roRead-only0x0Refer to the Arm Generic Interrupt Controller Architecture Specification 2.0 for a detailed register descriptions.