Zynq UltraScale+ Devices Register Reference > Module Summary > A53_PMU_3 Module > DEVAFF0 (A53_PMU_3) Register

DEVAFF0 (A53_PMU_3) Register

DEVAFF0 (A53_PMU_3) Register Description

Register NameDEVAFF0
Relative Address0x0000000FA8
Absolute Address 0x00FEF30FA8 (CORESIGHT_A53_PMU_3)
Width32
TyperoRead-only
Reset Value0x80000003
DescriptionPerformance Monitors Device Affinity Register 0

DEVAFF0 (A53_PMU_3) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PMDEVAFF031:0roRead-only0x80000003MPIDR_EL1 low half. Read-only copy of the low half of MPIDR_EL1, as seen from the highest implemented exception level.