Zynq UltraScale+ Devices Register Reference > Module Summary > R5_ETM_0 Module > FFLR (R5_ETM_0) Register

FFLR (R5_ETM_0) Register

FFLR (R5_ETM_0) Register Description

Register NameFFLR
Relative Address0x000000002C
Absolute Address 0x00FEBFC02C (CORESIGHT_R5_ETM_0)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionFIFOFULL Level Register

FFLR (R5_ETM_0) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Level 7:0rwNormal read/write0The number of bytes left in the FIFO, below which the FIFOFULL or SuppressData signal is asserted. For example, setting this value to 15 causes data trace suppression or processor stalling, if enabled, when there are less than 15 free bytes in the FIFO.