Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_CBA2R4 (SMMU500) Register

SMMU_CBA2R4 (SMMU500) Register

SMMU_CBA2R4 (SMMU500) Register Description

Register NameSMMU_CBA2R4
Relative Address0x0000001810
Absolute Address 0x00FD801810 (SMMU_GPV)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionExtends the configuration attributes for the translation context bank that SMMU_CBARn specifies.

SMMU_CBA2R4 (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
MONC 1rwNormal read/write0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
VA64 0rwNormal read/write0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details