Zynq UltraScale+ Devices Register Reference > Module Summary > IPI Module > IPI_CTRL (IPI) Register
Register Name | IPI_CTRL |
---|---|
Relative Address | 0x0000080000 |
Absolute Address | 0x00FF380000 (IPI) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | IPI Controller Error Signal Control. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
slverr_enable | 0 | rwNormal read/write | 0x0 | Unimplemented Register Access. Enable the PSLVERR signal back to APB master when an unimplemented register is accessed. 0: do not send PSLVERR. 1: assert PSLVERR for unimplemented register accesses. Note: The [addr_decode_err] interrupt bit is set in the IPI_ISR regardless of the setting of this bit. |