Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_CB12_ACTLR (SMMU500) Register
Register Name | SMMU_CB12_ACTLR |
---|---|
Relative Address | 0x000001C004 |
Absolute Address | 0x00FD81C004 (SMMU_GPV) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000003 |
Description | The Auxillary Control register provides implementation specific configuration and control options. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
CPRE | 1 | rwNormal read/write | 0x1 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |
CMTLB | 0 | rwNormal read/write | 0x1 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |