Zynq UltraScale+ Devices Register Reference > Module Summary > PCIE_ATTRIB Module > ATTR_28 (PCIE_ATTRIB) Register

ATTR_28 (PCIE_ATTRIB) Register

ATTR_28 (PCIE_ATTRIB) Register Description

Register NameATTR_28
Relative Address0x0000000070
Absolute Address 0x00FD480070 (PCIE_ATTRIB)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionATTR_28

This register should only be written to during reset of the PCIe block

ATTR_28 (PCIE_ATTRIB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved 9rwNormal read/write0x0reserved.
attr_dev_control_aux_power_supported 8rwNormal read/write0x0Determines if Device Control[10] is writable.
attr_dev_cap_rsvd_31_29 7:5rwNormal read/write0x0Reserved bits [31:29] in Device Capability register
attr_dev_cap_rsvd_17_16 4:3rwNormal read/write0x0Reserved bits [17:16] in Device Capability register.
attr_dev_cap_rsvd_14_12 2:0rwNormal read/write0x0Reserved bits [14:12] in Device Capability register. Were previously power indicator, attention indicator and attention button