Zynq UltraScale+ Devices Register Reference > Module Summary > SERDES Module > RX_PROT_BUS_WIDTH (SERDES) Register

RX_PROT_BUS_WIDTH (SERDES) Register

RX_PROT_BUS_WIDTH (SERDES) Register Description

Register NameRX_PROT_BUS_WIDTH
Relative Address0x0000010044
Absolute Address 0x00FD410044 (SERDES)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000055
DescriptionRegister value is generated by Vivado PCW.

RX_PROT_BUS_WIDTH (SERDES) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
RX_PROT_BUS_WIDTH_31_8_rsvd31:8roRead-only0x0Value generated by PCW.
L3_RX_Prot_BusWidth 7:6rwNormal read/write0x1Value generated by PCW.
L2_RX_Prot_BusWidth 5:4rwNormal read/write0x1Value generated by PCW.
L1_RX_Prot_BusWidth 3:2rwNormal read/write0x1Value generated by PCW.
L0_RX_Prot_BusWidth 1:0rwNormal read/write0x1Value generated by PCW.