Zynq UltraScale+ Devices Register Reference > Module Summary > FPD_GPV Module > afifm0M_intfpd_max_comb_ot (FPD_GPV) Register
Register Name | afifm0M_intfpd_max_comb_ot |
---|---|
Relative Address | 0x0000045114 |
Absolute Address | 0x00FD745114 (FPD_GPV) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Maximum number of combined outstanding transactions |
A value of 0 for both the integer and fractional parts disables the programmable regulation so that the configuration limits apply. A value of 0 for the fractional part programs disables the regulation of fractional outstanding transactions. The regulation of the combined outstanding transaction limit also requires that you set the en_awar_ot control bit of the QoS control register.
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
awar_max_oti | 14:8 | rwNormal read/write | 0x0 | Integer part of max combined outstanding AW/AR addresses. |
awar_max_otf | 7:0 | rwNormal read/write | 0x0 | Fraction part of max combined outstanding AW/AR addresses. |