Zynq UltraScale+ Devices Register Reference > Module Summary > PLSYSMON Module > SEQ_CHANNEL0 (PLSYSMON) Register

SEQ_CHANNEL0 (PLSYSMON) Register

SEQ_CHANNEL0 (PLSYSMON) Register Description

Register NameSEQ_CHANNEL0
Relative Address0x0000000120
Absolute Address 0x00FFA50D20 (AMS_PL_SYSMON)
Width16
TyperwNormal read/write
Reset Value0x00000000
DescriptionSequencer Channel Inclusion, Group 0.

Include or exclude channels in the auto-sequencing routine. 0: exclude channel. 1: include channel. Note: UG580 refers to this register as SEQCHSEL1.

SEQ_CHANNEL0 (PLSYSMON) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
current_mon15rwNormal read/write0x0reserved
vccbram14rwNormal read/write0x0PL Block RAM Voltage sensor, VCCBRAM. Full-featured channel (supply3).
vrefn13rwNormal read/write0x0VRefN. Basic channel.
vrefp12rwNormal read/write0x0VRefP. Basic channel.
vp_vn11rwNormal read/write0x0VP_VN. Basic channel.
vccaux10rwNormal read/write0x0PL Auxiliary Voltage sensor, VCCAUX. Full-featured channel (supply2).
vccint 9rwNormal read/write0x0PL Internal Voltage sensor, VCCINT. Full-featured channel (supply1).
temperature 8rwNormal read/write0x0PL temperature sensor, Temp_PL. Full-featured channel.
vcc_psaux 7rwNormal read/write0x0VCC_PSAux. Full-featured channel.
vcc_psintfp 6rwNormal read/write0x0FPD Voltage sensor, VCC_PSINTFP. Full-featured channel (supply5).
vcc_psintlp 5rwNormal read/write0x0LPD Voltage sensor, VCC_PSINTLP. Full-featured channel (supply4).
Reserved 4rwNormal read/write0x0reserved.
Reserved 3rwNormal read/write0x0reserved.
Reserved 2rwNormal read/write0x0reserved.
Reserved 1rwNormal read/write0x0reserved.
calibration 0rwNormal read/write0x0Reserved, calibration is automatically performed at a slow sequence rate.