Zynq UltraScale+ Devices Register Reference > Module Summary > PMU_LOCAL Module > MBISR_CNTRL (PMU_LOCAL) Register

MBISR_CNTRL (PMU_LOCAL) Register

MBISR_CNTRL (PMU_LOCAL) Register Description

Register NameMBISR_CNTRL
Relative Address0x0000000330
Absolute Address 0x00FFD60330 (PMU_LOCAL)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionControls the MBISR engines in the FPD.

MBISR_CNTRL (PMU_LOCAL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:6roRead-only0x0reserved
FPD_Group 5rwNormal read/write0x0Apply MBISR for the FP domain. This needs to be set before Enable bit is set to 1 to start the MBISR operation.
Reserved 4:1roRead-only0x0reserved
Enable 0rwNormal read/write0x0This bit is driven by PMU to trigger the repair operation and needs to be 0 and then set to 1 after the FPD_Group is set to 1 in order to initialize MBISR chain on the FPD. Typically, the BISR chain is reset when this input is low.