Zynq UltraScale+ Devices Register Reference > Module Summary > OCM Module > OCM_IDS (OCM) Register

OCM_IDS (OCM) Register

OCM_IDS (OCM) Register Description

Register NameOCM_IDS
Relative Address0x0000000010
Absolute Address 0x00FF960010 (OCM)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionInterrupt Disable Register. A write of one to this location will mask the interrupt. (IMR: 1)

OCM_IDS (OCM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:11razRead as zero0x0Status for an address decode error interrupt.
UE_RMW10woWrite-only0x0see OCM_INT_STATUS register for details
FIX_BURST_WR 9woWrite-only0x0see OCM_INT_STATUS register for details
FIX_BURST_RD 8woWrite-only0x0see OCM_INT_STATUS register for details
ECC_UE 7woWrite-only0x0see OCM_INT_STATUS register for details
ECC_CE 6woWrite-only0x0see OCM_INT_STATUS register for details
LOCK_ERR_WR 5woWrite-only0x0see OCM_INT_STATUS register for details
LOCK_ERR_RD 4woWrite-only0x0see OCM_INT_STATUS register for details
INV_OCM_WR 3woWrite-only0x0see OCM_INT_STATUS register for details
INV_OCM_RD 2woWrite-only0x0see OCM_INT_STATUS register for details
PWR_DWN 1woWrite-only0x0see OCM_INT_STATUS register for details
INV_APB 0woWrite-only0x0see OCM_INT_STATUS register for details