Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_CB10_TLBIVA_low (SMMU500) Register

SMMU_CB10_TLBIVA_low (SMMU500) Register

SMMU_CB10_TLBIVA_low (SMMU500) Register Description

Register NameSMMU_CB10_TLBIVA_low
Relative Address0x000001A600
Absolute Address 0x00FD81A600 (SMMU_GPV)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionInvalidates all of the unlocked TLB entries that match both the VA provided and the TLB tagging scheme of the context bank, including any global entries if appropriate.

SMMU_CB10_TLBIVA_low (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Address31:0woWrite-only0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details