Zynq UltraScale+ Devices Register Reference > Module Summary > CSU Module > puf_tm_ul (CSU) Register

puf_tm_ul (CSU) Register

puf_tm_ul (CSU) Register Description

Register Namepuf_tm_ul
Relative Address0x0000004808
Absolute Address 0x00FFCA4808 (CSU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionPUF Testmode 1 Upper Limit

puf_tm_ul (CSU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
UL17:0rwNormal read/write0x0Frequency range upper limit counter