Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_CB12_CONTEXTIDR (SMMU500) Register

SMMU_CB12_CONTEXTIDR (SMMU500) Register

SMMU_CB12_CONTEXTIDR (SMMU500) Register Description

Register NameSMMU_CB12_CONTEXTIDR
Relative Address0x000001C034
Absolute Address 0x00FD81C034 (SMMU_GPV)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionIdentifies the current process identifier and the current address space identifier

SMMU_CB12_CONTEXTIDR (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PROCID31:8rwNormal read/write0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
ASID 7:0rwNormal read/write0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details