Zynq UltraScale+ Devices Register Reference > Module Summary > PMU_LMB_BRAM Module > CE_FFD (PMU_LMB_BRAM) Register

CE_FFD (PMU_LMB_BRAM) Register

CE_FFD (PMU_LMB_BRAM) Register Description

Register NameCE_FFD
Relative Address0x0000000100
Absolute Address 0x00FFD50100 (PMU_LMB_RAM)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionCorrectable Error First Failing Data

This register stores the (uncorrected) failing data of the first occurrence of an access with a correctable error. When the CE_STATUS bit in the ECC Status Register is cleared, this register is re-enabled to store the data of the next correctable error. Storing of failing data is enabled after reset.

CE_FFD (PMU_LMB_BRAM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
ce_ffd31:0roRead-only0x0Data of the first occurrence of a correctable error