Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_DBGRDATATCU (SMMU500) Register

SMMU_DBGRDATATCU (SMMU500) Register

SMMU_DBGRDATATCU (SMMU500) Register Description

Register NameSMMU_DBGRDATATCU
Relative Address0x000000008C
Absolute Address 0x00FD80008C (SMMU_GPV)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionCache entry data addressed by TCU debug read pointer.

SMMU_DBGRDATATCU (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
bits31:0roRead-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details