Zynq UltraScale+ Devices Register Reference > Module Summary > GEM Module > designcfg_debug7 (GEM) Register

designcfg_debug7 (GEM) Register

designcfg_debug7 (GEM) Register Description

Register Namedesigncfg_debug7
Relative Address0x0000000298
Absolute Address 0x00FF0B0298 (GEM0)
0x00FF0C0298 (GEM1)
0x00FF0D0298 (GEM2)
0x00FF0E0298 (GEM3)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionDesign Configuration Register 7

designcfg_debug7 (GEM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
tx_pbuf_num_segments_q731:28roRead-only0x0Takes the value of the `gem_tx_pbuf_num_segments_q7 DEFINE
tx_pbuf_num_segments_q627:24roRead-only0x0Takes the value of the `gem_tx_pbuf_num_segments_q6 DEFINE
tx_pbuf_num_segments_q523:20roRead-only0x0Takes the value of the `gem_tx_pbuf_num_segments_q5 DEFINE
tx_pbuf_num_segments_q419:16roRead-only0x0Takes the value of the `gem_tx_pbuf_num_segments_q4 DEFINE
tx_pbuf_num_segments_q315:12roRead-only0x0Takes the value of the `gem_tx_pbuf_num_segments_q3 DEFINE
tx_pbuf_num_segments_q211:8roRead-only0x0Takes the value of the `gem_tx_pbuf_num_segments_q2 DEFINE
tx_pbuf_num_segments_q1 7:4roRead-only0x0Takes the value of the `gem_tx_pbuf_num_segments_q1 DEFINE
tx_pbuf_num_segments_q0 3:0roRead-only0x0Takes the value of the `gem_tx_pbuf_num_segments_q0 DEFINE