Zynq UltraScale+ Devices Register Reference > Module Summary > GPU Module > PP1_REND_LIST_ADDR (GPU) Register

PP1_REND_LIST_ADDR (GPU) Register

PP1_REND_LIST_ADDR (GPU) Register Description

Register NamePP1_REND_LIST_ADDR
Relative Address0x000000A000
Absolute Address 0x00FD4BA000 (GPU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionRenderer List Address Register

PP1_REND_LIST_ADDR (GPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
REND_LIST_ADDR31:3rwNormal read/write0x0Start address of the polygon list to use for the frame
_ 2:0rwNormal read/write0x0Reserved, write as zero, read undefined