Zynq UltraScale+ Devices Register Reference > Module Summary > USB3_XHCI Module > DCERSTBA_LO (USB3_XHCI) Register

DCERSTBA_LO (USB3_XHCI) Register

DCERSTBA_LO (USB3_XHCI) Register Description

Register NameDCERSTBA_LO
Relative Address0x0000000920
Absolute Address 0x00FE200920 (USB3_0_XHCI)
0x00FE300920 (USB3_1_XHCI)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionDCERSTBA_LO

DCERSTBA_LO (USB3_XHCI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
ERS_TABLE_BAR31:4rwNormal read/write0ERS_TABLE_BAR
Reserved 3:0roRead-only0x0Reserved