Zynq UltraScale+ Devices Register Reference > Module Summary > CSU Module > pcap_reset (CSU) Register
Register Name | pcap_reset |
---|---|
Relative Address | 0x000000300C |
Absolute Address | 0x00FFCA300C (CSU) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000001 |
Description | PCAP Reset |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
reset | 0 | rwNormal read/write | 0x1 | Reset for the PCAP, including the RD/WR FIFO. The PCAP remains in reset until this bit is set low. |