Zynq UltraScale+ Devices Register Reference > Module Summary > TSGEN Module > PIDR0 (TSGEN) Register

PIDR0 (TSGEN) Register

PIDR0 (TSGEN) Register Description

Register NamePIDR0
Relative Address0x0000000FE0
Absolute Address 0x00FE900FE0 (CORESIGHT_SOC_TSGEN)
Width32
TyperoRead-only
Reset Value0x00000001
DescriptionPart of the set of Peripheral Identification registers. Contains part of the designer specific part number.

PIDR0 (TSGEN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PART_0 7:0roRead-only0x1Bits [7:0] of the component part number. This is selected by the designer of the component.