Zynq UltraScale+ Devices Register Reference > Module Summary > R5_ETM_1 Module > TEEVR (R5_ETM_1) Register

TEEVR (R5_ETM_1) Register

TEEVR (R5_ETM_1) Register Description

Register NameTEEVR
Relative Address0x0000000020
Absolute Address 0x00FEBFD020 (CORESIGHT_R5_ETM_1)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionTraceEnable Event Register

TEEVR (R5_ETM_1) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Event16:0rwNormal read/write0TraceEnable event