Zynq UltraScale+ Devices Register Reference > Module Summary > USB3_XHCI Module > GEVNTADRLO_2 (USB3_XHCI) Register
Register Name | GEVNTADRLO_2 |
---|---|
Relative Address | 0x000000C420 |
Absolute Address |
0x00FE20C420 (USB3_0_XHCI) 0x00FE30C420 (USB3_1_XHCI) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Global Event Buffer Address (Low) Register This is an alternate register for the GEVNTADRn register. Instance 2 of an array of 4. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
EVNTADRLO | 31:0 | rwNormal read/write | 0x0 | Event Buffer Address (EvntAdrLo) Holds the lower 32 bits of start address of the external memory for the Event Buffer. During operation, hardware does not update this address. |