Zynq UltraScale+ Devices Register Reference > Module Summary > PCIE_ATTRIB Module > ATTR_89 (PCIE_ATTRIB) Register
Register Name | ATTR_89 |
---|---|
Relative Address | 0x0000000164 |
Absolute Address | 0x00FD480164 (PCIE_ATTRIB) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00002281 |
Description | ATTR_89 |
This register should only be written to during reset of the PCIe block
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
attr_vsec_cap_on | 13 | rwNormal read/write | 0x1 | Indicates that the VSEC structures exists. If this is FALSE, then the VSEC structure cannot be accessed via either the link or the management port. |
attr_vsec_cap_nextptr | 12:1 | rwNormal read/write | 0x140 | VSECs Next Capability Offset pointer to the next item in the capabilities list, or 000h if this is the final capability. |
attr_vsec_cap_is_link_visible | 0 | rwNormal read/write | 0x1 | The VSEC structure can be detected by link-side config accesses if TRUE. Otherwise, it is only user-side visible. |