Zynq UltraScale+ Devices Register Reference > Module Summary > IOU_SLCR Module > isr (IOU_SLCR) Register
Register Name | isr |
---|---|
Relative Address | 0x0000000700 |
Absolute Address | 0x00FF180700 (IOU_SLCR) |
Width | 1 |
Type | wtcReadable, write a 1 to clear |
Reset Value | 0x00000000 |
Description | Address Decode Error Interrupt Status |
This is a sticky register that holds the value of the interrupt until cleared by a value of 1.
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
addr_decode_err | 0 | wtcReadable, write a 1 to clear | 0x0 | Status for an address decode error interrupt. 0: No Event 1: Event Occurred |