Zynq UltraScale+ Devices Register Reference > Module Summary > XPPU Module > CTRL (XPPU) Register

CTRL (XPPU) Register

CTRL (XPPU) Register Description

Register NameCTRL
Relative Address0x0000000000
Absolute Address 0x00FF980000 (LPD_XPPU)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionControl.

XPPU enable, parity errors.

CTRL (XPPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:3roRead-only0x0reserved
APER_PARITY_EN 2rwNormal read/write0x0Enable parity error checking for the aperture entries {0:400} fetched from the local RAM.
0: disable.
1: enable.
MID_PARITY_EN 1rwNormal read/write0x0Enable parity error checking for Master ID entries {0:19} held in local registers.
0: parity errors are ignored.
1: parity errors are flagged in the ISR register.
ENABLE 0rwNormal read/write0x0Permission checking.
0: bypass (transactions pass-thru).
1: enable (transactions are validated by the XPPU).