Zynq UltraScale+ Devices Register Reference > Module Summary > IOU_SLCR Module > itr (IOU_SLCR) Register
Register Name | itr |
---|---|
Relative Address | 0x0000000710 |
Absolute Address | 0x00FF180710 (IOU_SLCR) |
Width | 1 |
Type | woWrite-only |
Reset Value | 0x00000000 |
Description | Address Decode Error Interrupt Trigger |
A write of one to this location will set the address decode error interrupt status register.
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
addr_decode_err | 0 | woWrite-only | 0x0 | Trigger an address decode error interrupt. 0: Ignored 1: Sets status register, isr to a 1. |