Zynq UltraScale+ Devices Register Reference > Module Summary > PCIE_ATTRIB Module > ATTR_40 (PCIE_ATTRIB) Register
Register Name | ATTR_40 |
---|---|
Relative Address | 0x00000000A0 |
Absolute Address | 0x00FD4800A0 (PCIE_ATTRIB) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000405 |
Description | ATTR_40 |
This register should only be written to during reset of the PCIe block
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
attr_msi_cap_multimsgcap | 11:9 | rwNormal read/write | 0x2 | Multiple Message Capable. Each MSI function may request up to 32 unique messages. System software may read this field to determine the number of messages requested. Number of messages requested are encoded as follows: 0h = 1 vector 1h= 2 vectors 2h= 4.vectors 3h= 8 vectors 4h= 16 vectors ,5h= 32 vectors 6h, 7h= Rsvd |
attr_msi_cap_multimsg_extension | 8 | rwNormal read/write | 0x0 | Multiple Message Capable Extension - When set this allows 256 unique messages to be sent by the user (regardless of what MSI_CAP_MULTIMSGCAP is set to). |
attr_msi_cap_id | 7:0 | rwNormal read/write | 0x5 | The capability identifier of MSI capability. The value is transferred to the MSI Capabilities Register[7:0]. |