Zynq UltraScale+ Devices Register Reference > Module Summary > USB3_XHCI Module > HCSPARAMS2 (USB3_XHCI) Register
Register Name | HCSPARAMS2 |
---|---|
Relative Address | 0x0000000008 |
Absolute Address |
0x00FE200008 (USB3_0_XHCI) 0x00FE300008 (USB3_1_XHCI) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | Structural Parameters 2 Register For register definitions, refer to the xHCI specification. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
MAXSCRATCHPADBUFS | 31:27 | roRead-only | 0 | Max Scratchpad Bufs Lo The value is calculated based on chosen configuration parameter values. Possible values are 1-4. |
SPR | 26 | roRead-only | 0 | Scratchpad Restore (SPR) |
MAXSCRATCHPADBUFS_HI | 25:21 | roRead-only | 0 | Max Scratchpad Bufs HI The core automatically updates this field. |
Reserved | 20:8 | roRead-only | 0x0 | Reserved |
ERSTMAX | 7:4 | roRead-only | 0 | Event Ring Segment Table Max (ERST Max) |
IST | 3:0 | roRead-only | 0 | Isochronous Scheduling Threshold (IST) |