Zynq UltraScale+ Devices Register Reference > Module Summary > DISPLAY_PORT Module > DP_AUX_REPLY_DATA (DISPLAY_PORT) Register
Register Name | DP_AUX_REPLY_DATA |
---|---|
Relative Address | 0x0000000134 |
Absolute Address | 0x00FD4A0134 (DISPLAY_PORT) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | Maps to the internal FIFO which contains up to 16 bytes of information received during the AUX channel reply. Reply data is read from the FIFO starting with byte 0. The number of bytes in the FIFO corresponds to the number of bytes requested. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:8 | razRead as zero | 0x0 | |
AUX_REPLY_DATA | 7:0 | roRead-only | 0x0 | AUX reply data |