Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_CB1_FAR_high (SMMU500) Register

SMMU_CB1_FAR_high (SMMU500) Register

SMMU_CB1_FAR_high (SMMU500) Register Description

Register NameSMMU_CB1_FAR_high
Relative Address0x0000011064
Absolute Address 0x00FD811064 (SMMU_GPV)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionHolds the Upper input address bits [63:32] of the memory access that caused a synchronous abort exception.

SMMU_CB1_FAR_high (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
bits16:0rwNormal read/write0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details