Zynq UltraScale+ Devices Register Reference > Module Summary > FPD_SLCR_SECURE Module > idr (FPD_SLCR_SECURE) Register

idr (FPD_SLCR_SECURE) Register

idr (FPD_SLCR_SECURE) Register Description

Register Nameidr
Relative Address0x0000000014
Absolute Address 0x00FD690014 (FPD_SLCR_SECURE)
Width 1
TypewoWrite-only
Reset Value0x00000000
DescriptionInterrupt Disable

Write a 1 to mask the interrupt. (sets IMR bit = 1)

idr (FPD_SLCR_SECURE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
addr_decode_err 0woWrite-only0x0Mask for an address decode error.
Writes:
0: ignored.
1: IMR register bit set to 1.