Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_ITOP_PERF_INDEX (SMMU500) Register

SMMU_ITOP_PERF_INDEX (SMMU500) Register

SMMU_ITOP_PERF_INDEX (SMMU500) Register Description

Register NameSMMU_ITOP_PERF_INDEX
Relative Address0x000000200C
Absolute Address 0x00FD80200C (SMMU_GPV)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionEnables TBU performance interrupts.

SMMU_ITOP_PERF_INDEX (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
WAY_IPA2PA_PF31:30woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
IPA2PA_PF_INDEX22:16woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
WAY_MTLB_WC15:14woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
MTLB_WC_INDEX11:0woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details