Zynq UltraScale+ Devices Register Reference > Module Summary > A53_ETM_1 Module > TSCTLR (A53_ETM_1) Register
Register Name | TSCTLR |
---|---|
Relative Address | 0x0000000030 |
Absolute Address | 0x00FED40030 (CORESIGHT_A53_ETM_1) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Global Timestamp Control Register |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
EVENT | 7:0 | rwNormal read/write | 0x0 | An event selector. When the selected event is triggered, the trace unit inserts a global timestamp into the trace streams. |