Zynq UltraScale+ Devices Register Reference > Module Summary > PMU_GLOBAL Module > ADDR_ERROR_INT_MASK (PMU_GLOBAL) Register

ADDR_ERROR_INT_MASK (PMU_GLOBAL) Register

ADDR_ERROR_INT_MASK (PMU_GLOBAL) Register Description

Register NameADDR_ERROR_INT_MASK
Relative Address0x0000000014
Absolute Address 0x00FFD80014 (PMU_GLOBAL)
Width32
TyperoRead-only
Reset Value0x00000001
DescriptionRegister Address Error; Interrupt Mask.

Refer to Status and Clear register for more information.

ADDR_ERROR_INT_MASK (PMU_GLOBAL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:1roRead-only0x0reserved
Mask 0roRead-only0x1Interrupt mask. Read operation.
0: unmasked (enabled).
1: masked (disabled).