Zynq UltraScale+ Devices Register Reference > Module Summary > PMU_LOCAL Module > L2_PWR_STATUS (PMU_LOCAL) Register
Register Name | L2_PWR_STATUS |
---|---|
Relative Address | 0x00000000BC |
Absolute Address | 0x00FFD600BC (PMU_LOCAL) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000001 |
Description | L2 Cache Memory Power Status. |
Status of the power switch gates. 0: off. 1: on, ready. All fields are read-only and are accessible only by the PMU processor.
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:1 | roRead-only | 0x0 | reserved |
Bank0 | 0 | roRead-only | 0x1 | L2 Cache power switch status. |