Zynq UltraScale+ Devices Register Reference > Module Summary > A53_DBG_1 Module > EDPCSR_63to32 (A53_DBG_1) Register
Register Name | EDPCSR_63to32 |
---|---|
Relative Address | 0x00000000AC |
Absolute Address | 0x00FED100AC (CORESIGHT_A53_DBG_1) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | External Debug Program Counter Sample Register (high word) |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
EDPCSR_63to32 | 31:0 | roRead-only | 0 | PC Sample high word, EDPCSRhi. If EDVIDSR.HV == 0 then this field is RAZ, otherwise bits [63:32] of the sampled PC. |