Zynq UltraScale+ Devices Register Reference > Module Summary > DDRC Module > ECCCFG0 (DDRC) Register
Register Name | ECCCFG0 |
---|---|
Relative Address | 0x0000000070 |
Absolute Address | 0x00FD070070 (DDRC) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | ECC Configuration Register 0 |
This register is static. Static registers can only be written when the controller is in reset.
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
dis_scrub | 4 | rwNormal read/write | 0x0 | Disable ECC scrubs. Valid only when ECCCFG0.ecc_mode = 3b100 |
ecc_mode | 2:0 | rwNormal read/write | 0x0 | ECC mode indicator - 000 - ECC disabled - 100 - ECC enabled - SEC/DED over 1 beat - all other settings are reserved for future use |