Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_CIDR2 (SMMU500) Register

SMMU_CIDR2 (SMMU500) Register

SMMU_CIDR2 (SMMU500) Register Description

Register NameSMMU_CIDR2
Relative Address0x0000000FF8
Absolute Address 0x00FD800FF8 (SMMU_GPV)
Width32
TyperoRead-only
Reset Value0x00000005
DescriptionComponent Identification register 2

SMMU_CIDR2 (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PREAMBLE 7:0roRead-only0x5Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details