Zynq UltraScale+ Devices Register Reference > Module Summary > PCIE_ATTRIB Module > ATTR_105 (PCIE_ATTRIB) Register

ATTR_105 (PCIE_ATTRIB) Register

ATTR_105 (PCIE_ATTRIB) Register Description

Register NameATTR_105
Relative Address0x00000001A4
Absolute Address 0x00FD4801A4 (PCIE_ATTRIB)
Width32
TyperwNormal read/write
Reset Value0x00000172
DescriptionATTR_105

This register should only be written to during reset of the PCIe block

ATTR_105 (PCIE_ATTRIB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr_vc0_total_credits_cd10:0rwNormal read/write0x172Number of credits that should be advertised for Completion data received on Virtual Channel 0.
The bytes advertised must be less than or equal to the bram bytes available.
See VC0_RX_RAM_LIMIT