Zynq UltraScale+ Devices Register Reference > Module Summary > GPIO Module > INT_MASK_5 (GPIO) Register
Register Name | INT_MASK_5 |
---|---|
Relative Address | 0x000000034C |
Absolute Address | 0x00FF0A034C (GPIO) |
Width | 32 |
Type | roRead-only |
Reset Value | 0xFFFFFFFF |
Description | Interrupt Mask Status (GPIO Bank5, EMIO Bank2) |
This register operates in exactly the same manner as INT_MASK_0, except that it reflects bank5, which corresponds to EMIO[95:64].
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
INT_MASK_5 | 31:0 | roRead-only | 0xFFFFFFFF | Interrupt mask 0: interrupt source enabled 1: interrupt source masked Each bit reports the status for the corresponding pin within the 32-bit bank |