Zynq UltraScale+ Devices Register Reference > Module Summary > USB3_XHCI Module > USBLEGSUP (USB3_XHCI) Register
Register Name | USBLEGSUP |
---|---|
Relative Address | 0x00000008E0 |
Absolute Address |
0x00FE2008E0 (USB3_0_XHCI) 0x00FE3008E0 (USB3_1_XHCI) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | USBLEGSUP |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:25 | roRead-only | 0x0 | Reserved |
HC_OS_OWNED | 24 | rwNormal read/write | 0 | HC_OS_OWNED SEMAPHORE For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.0. |
Reserved | 23:17 | roRead-only | 0x0 | Reserved |
HC_BIOS_OWNED | 16 | rwNormal read/write | 0 | HC_BIOS_OWNED SEMAPHORE For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.0. |
NEXT_CAPABILITY_POINTER | 15:8 | roRead-only | 0 | NEXT_CAPABILITY_POINTER For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.0. |
CAPABILITY_ID | 7:0 | roRead-only | 0 | CAPABILITY_ID set_register_field_attribute DWC_usb3_map/DWC_usb3_block_HC_Extended_Capability_Register/USBLEGSUP/CAPABILITY_ID RegisterResetValue 0x1 For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.0. |