Zynq UltraScale+ Devices Register Reference > Module Summary > USB3_XHCI Module > GRXTHRCFG (USB3_XHCI) Register
Register Name | GRXTHRCFG |
---|---|
Relative Address | 0x000000C10C |
Absolute Address |
0x00FE20C10C (USB3_0_XHCI) 0x00FE30C10C (USB3_1_XHCI) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | Global Rx Threshold Control Register In a normal case, a Tx burst starts as soon as one packet is prefetched; an Rx burst starts as soon as 1-packet space is available. This works well as long as the system bus is faster than the USB 3.0 bus (a 1024-bytes packet takes ~2.2 microseconds on the USB bus in SS mode). If the system bus latency is larger than 2.2 microseconds to access a 1024-byte packet, then starting a burst on 1-packet condition leads to an early abort of the burst causing unnecessary performance reduction. To avoid underrun and overrun during the burst, in a high-latency bus system (like USB), threshold and burst size control is provided through GTXTHRCFG and GRXTHRCFG registers. Bit [29] of the GTXTHRCFG and GRXTHRCFG registers enables this feature. For more information on - Using this register, refer to Architecture Details chapter. - Selecting values for the fields of this register. Note: - GRXTHRCFG register is not applicable for Debug Target. - GRXTHRCFG register is not applicable in USB 2.0-only mode. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:30 | roRead-only | 0x0 | Reserved |
USBRxPktCntSel | 29 | rwNormal read/write | 0 | USB ReceivePacket Count Enable This field enables/disables the USB reception multi-packet thresholding: - 0: The core can only start reception on the USB when the RX FIFO has space for at least one packet. - 1: The core can only start reception on the USB when the RX FIFO has space for at least USBRxPktCnt amount of packets. This mode is valid in both host and device mode. It is only used for SuperSpeed. In device mode, - Setting this bit to 1 also enables the functionality of reporting NUMP in the ACK TP based on the RX FIFO space instead of reporting a fixed NUMP derived from DCFG.NUMP - If you are using external buffer control (EBC) feature, disable this mode by setting USBRxPktCntSel to 0. |
Reserved | 28 | roRead-only | 0x0 | Reserved |
USBRxPktCnt | 27:24 | rwNormal read/write | 0 | USB Receive Packet Count In host mode, this field specifies the space (in terms of the number of packets) that must be available in the RX FIFO before the core can start the corresponding USB RX transaction (burst). In device mode, this field specifies the space (in terms of the number of packets) that must be available in the RX FIFO before the core can send ERDY for a flow-controlled endpoint. This field is valid only when the USB Receive Packet Count Enable field is set to 1. The valid values for this field are from 1 to 15. Note: This field must be less than or equal to the USB Maximum Receive Burst Size field. |
USBMaxRxBurstSize | 23:19 | rwNormal read/write | 0 | USB Maximum Receive Burst Size In host mode, this field specifies the Maximum Bulk IN burst the controller can perform. When the system bus is slower than the USB, RX FIFO can overrun during a long burst. You can program a smaller value to this field to limit the RX burst size that the core can perform. It only applies to SS Bulk, Isochronous, and Interrupt IN endpoints in the host mode. In device mode, this field specifies the NUMP value that is sent in ERDY for an OUT endpoint. This field is valid only when USBRxPktCntSel is one. The valid values for this field are from 1 to 16. |
Reserved | 18:16 | roRead-only | 0x0 | Reserved |
Reserved | 15 | roRead-only | 0x0 | Reserved |
Reserved | 14:13 | roRead-only | 0x0 | Reserved |
ResvISOCOUTSpc | 12:0 | rwNormal read/write | 0 | Reserved for future use |