Zynq UltraScale+ Devices Register Reference > Module Summary > USB3_XHCI Module > GTXTHRCFG (USB3_XHCI) Register
Register Name | GTXTHRCFG |
---|---|
Relative Address | 0x000000C108 |
Absolute Address |
0x00FE20C108 (USB3_0_XHCI) 0x00FE30C108 (USB3_1_XHCI) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | Global Tx Threshold Control Register For more information on - Using this register, refer to Architecture Details chapter. - Selecting values for the fields of this register. Note: - All the fields in GTXTHRCFG register are valid only in Host mode. - GTXTHRCFG register is not applicable for Debug Target. - GTXTHRCFG register is not applicable in USB 2.0-only mode. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31 | roRead-only | 0x0 | Reserved |
Reserved | 30 | roRead-only | 0x0 | Reserved |
USBTxPktCntSel | 29 | rwNormal read/write | 0 | USB Transmit Packet Count Enable This field enables/disables the USB transmission multi-packet thresholding: - 0: USB transmission multi-packet thresholding is disabled; the core can only start transmission on the USB after the entire packet has been fetched into the corresponding TXFIFO. - 1: USB transmission multi-packet thresholding is enabled. The core can only start transmission on the USB after USB Transmit Packet Count amount of packets for the USB transaction (burst) are already in the corresponding TXFIFO. This mode is only valid in the host mode. It is only used for SuperSpeed. |
Reserved | 28 | roRead-only | 0x0 | Reserved |
USBTxPktCnt | 27:24 | rwNormal read/write | 0 | USB Transmit Packet Count This field specifies the number of packets that must be in the TXFIFO before the core can start transmission for the corresponding USB transaction (burst). This field is only valid when the USB Transmit Packet Count Enable field is set to one. Valid values are from 1 to 15. Note: This field must be less than or equal to the USB Maximum TX Burst Size field. |
USBMaxTxBurstSize | 23:16 | rwNormal read/write | 0 | USB Maximum TX Burst Size When USBTxPktCntSel is 1, this field specifies the Maximum Bulk OUT burst the core can execute. When the system bus is slower than the USB, TX FIFO can underrun during a long burst. You can program a smaller value to this field to limit the TX burst size that the core can execute. It only applies to SS Bulk, Isochronous, and Interrupt OUT endpoints in the host mode. Valid values are from 1 to 16. |
Reserved | 15 | roRead-only | 0x0 | Reserved_15 |
Reserved | 14 | roRead-only | 0x0 | Reserved1(Rsvd/Rs) Register field must write only 0 by the application. The read value must be treated as X (unknown). |
Reserved | 13:11 | roRead-only | 0x0 | Reserved (Rsvd/Rs) The register field must write only 0 by the application. The read value must be treated as X (unknown). |
Reserved | 10:0 | roRead-only | 0x0 | Reserved for future use |