Zynq UltraScale+ Devices Register Reference > Module Summary > GPU Module > PP1_ABGR_CLEAR_VALUE_2 (GPU) Register

PP1_ABGR_CLEAR_VALUE_2 (GPU) Register

PP1_ABGR_CLEAR_VALUE_2 (GPU) Register Description

Register NamePP1_ABGR_CLEAR_VALUE_2
Relative Address0x000000A020
Absolute Address 0x00FD4BA020 (GPU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionABGR Clear Value 2 Register

PP1_ABGR_CLEAR_VALUE_2 (GPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
ALPHA_CLEAR_VALUE31:24rwNormal read/write0x0Alpha clear value when FP_TILEBUF_ENABLE==0 , [31:0] Reserved, write as zero, read undefined when FP_TILEBUF_ENABLE==1
BLUE_CLEAR_VALUE23:16rwNormal read/write0x0Blue clear value when FP_TILEBUF_ENABLE==0
GREEN_CLEAR_VALUE15:8rwNormal read/write0x0Green clear value when FP_TILEBUF_ENABLE==0
RED_CLEAR_VALUE 7:0rwNormal read/write0x0Red clear value when FP_TILEBUF_ENABLE==0