Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > PMINTENCLR (SMMU500) Register

PMINTENCLR (SMMU500) Register

PMINTENCLR (SMMU500) Register Description

Register NamePMINTENCLR
Relative Address0x0000003C60
Absolute Address 0x00FD803C60 (SMMU_GPV)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionPerformance Monitor Interrupt Enable Clear registers are used disable the generation of interrupts on overflows of the event counters.

PMINTENCLR (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
P2323woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P2222woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P2121woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P2020woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P1919woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P1818woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P1717woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P1616woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P1515woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P1414woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P1313woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P1212woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P1111woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P1010woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P9 9woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P8 8woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P7 7woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P6 6woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P5 5woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P4 4woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P3 3woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P2 2woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P1 1woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
P0 0woWrite-only0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details