Zynq UltraScale+ Devices Register Reference > Module Summary > GEM Module > designcfg_debug7 (GEM) Register
Register Name | designcfg_debug7 |
---|---|
Relative Address | 0x0000000298 |
Absolute Address |
0x00FF0B0298 (GEM0) 0x00FF0C0298 (GEM1) 0x00FF0D0298 (GEM2) 0x00FF0E0298 (GEM3) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | Design Configuration Register 7 |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
tx_pbuf_num_segments_q7 | 31:28 | roRead-only | 0x0 | Takes the value of the `gem_tx_pbuf_num_segments_q7 DEFINE |
tx_pbuf_num_segments_q6 | 27:24 | roRead-only | 0x0 | Takes the value of the `gem_tx_pbuf_num_segments_q6 DEFINE |
tx_pbuf_num_segments_q5 | 23:20 | roRead-only | 0x0 | Takes the value of the `gem_tx_pbuf_num_segments_q5 DEFINE |
tx_pbuf_num_segments_q4 | 19:16 | roRead-only | 0x0 | Takes the value of the `gem_tx_pbuf_num_segments_q4 DEFINE |
tx_pbuf_num_segments_q3 | 15:12 | roRead-only | 0x0 | Takes the value of the `gem_tx_pbuf_num_segments_q3 DEFINE |
tx_pbuf_num_segments_q2 | 11:8 | roRead-only | 0x0 | Takes the value of the `gem_tx_pbuf_num_segments_q2 DEFINE |
tx_pbuf_num_segments_q1 | 7:4 | roRead-only | 0x0 | Takes the value of the `gem_tx_pbuf_num_segments_q1 DEFINE |
tx_pbuf_num_segments_q0 | 3:0 | roRead-only | 0x0 | Takes the value of the `gem_tx_pbuf_num_segments_q0 DEFINE |