Zynq UltraScale+ Devices Register Reference > Module Summary > DPDMA Module > DPDMA_ALC1_ACC (DPDMA) Register
Register Name | DPDMA_ALC1_ACC |
---|---|
Relative Address | 0x0000000130 |
Absolute Address | 0x00FD4C0130 (DPDMA) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | ALC1 Accumulated Transaction Latency Register |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
latency | 31:0 | roRead-only | 0x0 | Accumulated trnasaction latecy since last enable |