Zynq UltraScale+ Devices Register Reference > Module Summary > DPDMA Module > DPDMA_CH0_DSCR_STRT_ADDR (DPDMA) Register
Register Name | DPDMA_CH0_DSCR_STRT_ADDR |
---|---|
Relative Address | 0x0000000204 |
Absolute Address | 0x00FD4C0204 (DPDMA) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Descriptor Start Address Register |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
LSB | 31:0 | rwNormal read/write | 0x0 | 32 bit start address for first descriptor fetch |