Zynq UltraScale+ Devices Register Reference > Module Summary > LPD_SLCR Module > ATB_PRESCALE (LPD_SLCR) Register
Register Name | ATB_PRESCALE |
---|---|
Relative Address | 0x0000006020 |
Absolute Address | 0x00FF416020 (LPD_SLCR) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x0000FFFF |
Description | ATB Sideband Signals |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:17 | razRead as zero | 0x0 | reserved for future use |
enable | 16 | rwNormal read/write | 0x0 | Counter Enable. When set to 1, timer will start running and timeouts may be reported. When set to 0, timeouts will not be detected. |
value | 15:0 | rwNormal read/write | 0xFFFF | 16 bit prescale value based on 100 MHz clock. The timeout will be set to 32000 * 10ns * this register. |