Zynq UltraScale+ Devices Register Reference > Module Summary > LPD_SLCR_SECURE Module > SAFETY_CHK (LPD_SLCR_SECURE) Register

SAFETY_CHK (LPD_SLCR_SECURE) Register

SAFETY_CHK (LPD_SLCR_SECURE) Register Description

Register NameSAFETY_CHK
Relative Address0x0000000030
Absolute Address 0x00FF4B0030 (LPD_SLCR_SECURE)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionSafety endpoint connectivity check.

Safety Requirement to provide a RW register that will allow S/W to check the concetivity of a connection without impacting the functional path

SAFETY_CHK (LPD_SLCR_SECURE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
CHK_VAL31:0rwNormal read/write0x0Safety check field