Zynq UltraScale+ Devices Register Reference > Module Summary > USB3_XHCI Module > DEVTEN (USB3_XHCI) Register
Register Name | DEVTEN |
---|---|
Relative Address | 0x000000C708 |
Absolute Address |
0x00FE20C708 (USB3_0_XHCI) 0x00FE30C708 (USB3_1_XHCI) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | Device Event Enable Register This register controls the generation of device-specific events. If an enable bit is set to 0, the event will not be generated. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:14 | roRead-only | 0x0 | Reserved |
VENDEVTSTRCVDEN | 12 | rwNormal read/write | 0 | Vendor Device Test LMP Received Event (VndrDevTstRcvedEn) |
Reserved | 11 | roRead-only | 0x0 | Reserved |
Reserved | 10 | roRead-only | 0x0 | Reserved |
ERRTICERREVTEN | 9 | rwNormal read/write | 0 | Erratic Error Event Enable |
Reserved | 8 | roRead-only | 0x0 | Reserved |
SOFTEVTEN | 7 | rwNormal read/write | 0 | Start of (u)frame |
U3L2L1SuspEn | 6 | rwNormal read/write | 0 | U3/L2-L1 Suspend Event Enable. |
HibernationReqEvtEn | 5 | rwNormal read/write | 0 | This bit enables/disables the generation of the Hibernation Request Event. |
WKUPEVTEN | 4 | rwNormal read/write | 0 | Resume/Remote Wakeup Detected Event Enable. |
ULSTCNGEN | 3 | rwNormal read/write | 0 | USB/Link State Change Event Enable |
CONNECTDONEEVTEN | 2 | rwNormal read/write | 0 | Connection Done Enable |
USBRSTEVTEN | 1 | rwNormal read/write | 0 | USB Reset Enable |
DISSCONNEVTEN | 0 | rwNormal read/write | 0 | Disconnect Detected Event Enable |