Zynq UltraScale+ Devices Register Reference > Module Summary > USB3_REGS Module > jitter_adjust (USB3_REGS) Register
Register Name | jitter_adjust |
---|---|
Relative Address | 0x0000000040 |
Absolute Address |
0x00FF9D0040 (USB3_0) 0x00FF9E0040 (USB3_1) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000020 |
Description | High Speed Jitter Adjustment |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:6 | razRead as zero | 0x0 | reserved for future |
fladj | 5:0 | rwNormal read/write | 0x20 | Frame length adjustment register. Default value is 125 us |