Zynq UltraScale+ Devices Register Reference > Module Summary > PMU_IOMODULE Module > IRQ_ENABLE (PMU_IOMODULE) Register

IRQ_ENABLE (PMU_IOMODULE) Register

IRQ_ENABLE (PMU_IOMODULE) Register Description

Register NameIRQ_ENABLE
Relative Address0x0000000038
Absolute Address 0x00FFD40038 (PMU_IOMODULE)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionInterrupt Enable Register

The Interrupt Enable Register enables assertion of the I/O Module interrupt output signal INTC_IRQ by individual interrupt sources. The contents of this register are also used to mask the value of the IRQ_STATUS register enabled interrupts in the IRQ_PENDING register

IRQ_ENABLE (PMU_IOMODULE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
CSU_PMU_SEC_LOCK31woWrite-only0x0Secure lockdown request from CSU
Reserved30woWrite-only0x0reserved
INV_ADDR29razRead as zero0x0Interrupt for Address Errors generated during accesses to PS SLCRs or PMU Global registers
PWR_DN_REQ28woWrite-only0x0Interrupt to signal a power-down request
PWR_UP_REQ27woWrite-only0x0Interrupt to signal a power-up request
SW_RST_REQ26woWrite-only0x0Interrupt to signal a software-generated reset request
HW_RST_REQ25woWrite-only0x0Interrupt for all hardware-generated Block Reset requests
ISO_REQ24woWrite-only0x0Interrupt to signal an isolation request
FW_REQ23woWrite-only0x0Interrupt to signal a custom request to FW
IPI322woWrite-only0x0Interrupt Associated with IPI slice 3 to PMU
IPI221woWrite-only0x0Interrupt Associated with IPI slice 2 to PMU
IPI120woWrite-only0x0Interrupt Associated with IPI slice 1 to PMU
IPI019woWrite-only0x0Interrupt Associated with IPI slice 0 to PMU
RTC_ALARM18woWrite-only0x0Interrupt from RTC to signal the Alarm
RTC_EVERY_SECOND17woWrite-only0x0Interrupt from RTC triggered every second
CORRECTABLE_ECC16woWrite-only0x0Interrupt for a single bit ECC detection in the PMU RAM
Reserved15razRead as zero0x0reserved
GPI314roRead-only0x0GPI3 changed
GPI213roRead-only0x0GPI2 changed
GPI112roRead-only0x0GPI1 changed
GPI011roRead-only0x0GPI0 changed
Reserved10:7razRead as zero0x0reserved
PIT3 6woWrite-only0x0PIT3 interrupt enabled
PIT2 5woWrite-only0x0PIT2 interrupt enabled
PIT1 4woWrite-only0x0PIT1 interrupt enabled
PIT0 3woWrite-only0x0PIT0 interrupt enabled
Reserved 2razRead as zero0x0reserved
Reserved 1razRead as zero0x0reserved
Reserved 0razRead as zero0x0reserved