Zynq UltraScale+ Devices Register Reference > Module Summary > PCIE_ATTRIB Module > ATTR_80 (PCIE_ATTRIB) Register
Register Name | ATTR_80 |
---|---|
Relative Address | 0x0000000140 |
Absolute Address | 0x00FD480140 (PCIE_ATTRIB) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | ATTR_80 |
This register should only be written to during reset of the PCIe block
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
attr_slot_cap_power_indicator_present | 14 | rwNormal read/write | 0x0 | Power Indicator Present. When TRUE, indicates that a Power Indicator is implemented on the chassis for this slot. Transferred to the Slot Capabilities register. |
attr_slot_cap_power_controller_present | 13 | rwNormal read/write | 0x0 | Power Controller Present. When TRUE, indicates that a Power Controller is implemented for this slot. Transferred to the Slot Capabilities register. |
attr_slot_cap_physical_slot_num | 12:0 | rwNormal read/write | 0x0 | Physical Slot Number. The physical slot number attached to this Port. Required to be globally unique within the chassis. Where the port is connected to devices that are either integrated on the system board or integrated within the same silicon as the Switch device or the Root port, this field should be set to 0. Transferred to the Slot Capabilities register. |