Zynq UltraScale+ Devices Register Reference > Module Summary > PMU_LOCAL Module > L2_PWR_STATUS (PMU_LOCAL) Register

L2_PWR_STATUS (PMU_LOCAL) Register

L2_PWR_STATUS (PMU_LOCAL) Register Description

Register NameL2_PWR_STATUS
Relative Address0x00000000BC
Absolute Address 0x00FFD600BC (PMU_LOCAL)
Width32
TyperoRead-only
Reset Value0x00000001
DescriptionL2 Cache Memory Power Status.

Status of the power switch gates. 0: off. 1: on, ready. All fields are read-only and are accessible only by the PMU processor.

L2_PWR_STATUS (PMU_LOCAL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:1roRead-only0x0reserved
Bank0 0roRead-only0x1L2 Cache power switch status.