Zynq UltraScale+ Devices Register Reference > Module Summary > GPU Module > PP1_WB1_TARGET_AA_FORMAT (GPU) Register

PP1_WB1_TARGET_AA_FORMAT (GPU) Register

PP1_WB1_TARGET_AA_FORMAT (GPU) Register Description

Register NamePP1_WB1_TARGET_AA_FORMAT
Relative Address0x000000A20C
Absolute Address 0x00FD4BA20C (GPU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionWB1 Target AA Format Register

PP1_WB1_TARGET_AA_FORMAT (GPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:15rwNormal read/write0x0Reserved, write as zero, read undefined.
WB1_TARGET_AA_Y14:12rwNormal read/write0x0Log2 of downsampling in y-direction
Reserved11:10rwNormal read/write0x0Reserved, write as zero, read undefined.
WB1_TARGET_AA_X 9:8rwNormal read/write0x0Log2 of downsampling in x-direction
Reserved 7:3rwNormal read/write0x0Reserved, write as zero, read undefined.
WB1_TARGET_AA_FORMAT 2:0rwNormal read/write0x0Blocked AA
Note:
WB1_TARGET_AA_FORMAT is
deprecated. Consequently you are
advised not to use these bits and to set
them to zero.