Zynq UltraScale+ Devices Register Reference > Module Summary > SATA_AHCI_PORTCNTRL Module > PBERR (SATA_AHCI_PORTCNTRL) Register

PBERR (SATA_AHCI_PORTCNTRL) Register

PBERR (SATA_AHCI_PORTCNTRL) Register Description

Register NamePBERR
Relative Address0x0000000070
Absolute Address 0x00FD0C0170 (SATA_AHCI_PORT0_CNTRL)
0x00FD0C01F0 (SATA_AHCI_PORT1_CNTRL)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000003
DescriptionPBERR - Port 0/1 BIST Error.

The BIST operation as programmed by the SATA must report the operation as passing or failing. This bit is added to reflect the status of the BIST operation running in the link layer. Note: All Status Registers have no predefined Reset value. The value shown in reset is a typical value that will be read after reset but will be dependent on the PS-GTR status, the actual value read can differ.

PBERR (SATA_AHCI_PORTCNTRL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:2roRead-only0x0Reserved
BEOS 1wtcReadable, write a 1 to clear0x1BIST Error one shot bit (BEOS):
1= BIST operation failed 0 = BIST operation passed. When the BIST.
BERR 0rwNormal read/write0x1BIST Error (BERR): 1= BIST operation failing 0 = BIST operation passing.