Zynq UltraScale+ Devices Register Reference > Module Summary > I2C Module
Module Name | I2C Module |
---|---|
Modules of this Type | I2C0, I2C1 |
Base Address | 0x00FF020000 (I2C0) 0x00FF030000 (I2C1) |
Description | Inter Integrated Circuit (I2C) Controller, I2C 0 Controller |
Register Name | Address | Width | Type | Reset Value | Description |
---|---|---|---|---|---|
Control_Reg | 0x0000000000 | 16 | mixedMixed types. See bit-field details. | 0x00000000 | Control Register |
Status_Reg | 0x0000000004 | 16 | roRead-only | 0x00000000 | Status register |
I2C_Address | 0x0000000008 | 16 | mixedMixed types. See bit-field details. | 0x00000000 | IIC Address register |
I2C_Data | 0x000000000C | 16 | mixedMixed types. See bit-field details. | 0x00000000 | IIC data register |
Interrupt_Status | 0x0000000010 | 16 | wtcReadable, write a 1 to clear | 0x00000000 | IIC interrupt status register |
Transfer_Size | 0x0000000014 | 8 | rwNormal read/write | 0x00000000 | Transfer Size Register |
Slave_Mon_Pause | 0x0000000018 | 8 | mixedMixed types. See bit-field details. | 0x00000000 | Slave Monitor Pause |
Time_Out | 0x000000001C | 8 | rwNormal read/write | 0x0000001F | I/O Clock Signal (SCL) Timeout Period |
Intrpt_Mask | 0x0000000020 | 16 | roRead-only | 0x000002FF | Interrupt Mask |
Intrpt_Enable | 0x0000000024 | 16 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Enable Register |
Intrpt_Disable | 0x0000000028 | 16 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Disable Register |
Glitch_Filter | 0x000000002C | 16 | mixedMixed types. See bit-field details. | 0x00000005 | Glitch Filter Control Register It is used for setting the length of the glitch filter shift register. If the length of glitch filter shift register is set to zero (0x0) then the glitch filter is bypassed. |