Zynq UltraScale+ Devices Register Reference > Module Summary > PCIE_ATTRIB Module > ATTR_109 (PCIE_ATTRIB) Register

ATTR_109 (PCIE_ATTRIB) Register

ATTR_109 (PCIE_ATTRIB) Register Description

Register NameATTR_109
Relative Address0x00000001B4
Absolute Address 0x00FD4801B4 (PCIE_ATTRIB)
Width32
TyperwNormal read/write
Reset Value0x00007E04
DescriptionATTR_109

This register should only be written to during reset of the PCIe block

ATTR_109 (PCIE_ATTRIB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr_tecrc_ep_inv15rwNormal read/write0x0Not currently in use.
Invert ECRC generated by block when trn_tecrc_gen_n and trn_terrfwd_n are asserted.
attr_recrc_chk_trim14rwNormal read/write0x1Enables td bit clear and ECRC trim on received TLPs FALSE == dont trim TRUE == trim.
attr_recrc_chk13:12rwNormal read/write0x3Enables ECRC check on received TLPs 0 == dont check 1 == always check 3 == check if enabled by ECRC check enable bit of AER cap structure
attr_vc0_tx_lastpacket11:7rwNormal read/write0x1CIndex of last packet buffer used by TX TLM (i.e. number of buffers - 1). Calculated from max payload size supported and the number of brams configured for transmit
attr_vc0_total_credits_ph 6:0rwNormal read/write0x4Number of credits that should be advertised for Posted headers received on Virtual Channel 0. The sum of the posted, non posted, and completion header credits must be <= 80