Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_PIDR2 (SMMU500) Register

SMMU_PIDR2 (SMMU500) Register

SMMU_PIDR2 (SMMU500) Register Description

Register NameSMMU_PIDR2
Relative Address0x0000000FE8
Absolute Address 0x00FD800FE8 (SMMU_GPV)
Width32
TyperoRead-only
Reset Value0x0000001B
DescriptionPeripheral Identificaation register 2

SMMU_PIDR2 (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Architecture_Revision 7:4roRead-only0x1Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
JEDEC 3roRead-only0x1Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details
JEP106_identity_code 2:0roRead-only0x3Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details