Zynq UltraScale+ Devices Register Reference > Module Summary > PCIE_ATTRIB Module > ATTR_40 (PCIE_ATTRIB) Register

ATTR_40 (PCIE_ATTRIB) Register

ATTR_40 (PCIE_ATTRIB) Register Description

Register NameATTR_40
Relative Address0x00000000A0
Absolute Address 0x00FD4800A0 (PCIE_ATTRIB)
Width32
TyperwNormal read/write
Reset Value0x00000405
DescriptionATTR_40

This register should only be written to during reset of the PCIe block

ATTR_40 (PCIE_ATTRIB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr_msi_cap_multimsgcap11:9rwNormal read/write0x2Multiple Message Capable.
Each MSI function may request up to 32 unique messages.
System software may read this field to determine the number of messages requested.
Number of messages requested are encoded as follows:
0h = 1 vector
1h=
2 vectors
2h=
4.vectors
3h=
8 vectors
4h= 16 vectors
,5h= 32 vectors
6h, 7h=
Rsvd
attr_msi_cap_multimsg_extension 8rwNormal read/write0x0Multiple Message Capable Extension - When set this allows 256 unique messages to be sent by the user (regardless of what MSI_CAP_MULTIMSGCAP is set to).
attr_msi_cap_id 7:0rwNormal read/write0x5The capability identifier of MSI capability. The value is transferred to the MSI Capabilities Register[7:0].