Zynq UltraScale+ Devices Register Reference > Module Summary > DDR_PHY Module > DX7GCR5 (DDR_PHY) Register

DX7GCR5 (DDR_PHY) Register

DX7GCR5 (DDR_PHY) Register Description

Register NameDX7GCR5
Relative Address0x0000000E14
Absolute Address 0x00FD080E14 (DDR_PHY)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x09090909
DescriptionDATX8 n General Configuration Register 5

DX7GCR5 (DDR_PHY) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31roRead-only0x0Reserved. Returns zeros on reads.
Reserved30:24rwNormal read/write0x9reserved.
Reserved23roRead-only0x0Reserved. Returns zeros on reads.
Reserved22:16rwNormal read/write0x9reserved.
Reserved15roRead-only0x0Reserved. Returns zeros on reads.
DXREFISELR114:8rwNormal read/write0x9Byte Lane internal VREF Select for Rank 1: Selects the generated
VREF value for internal byte lane differential IO buffers.
Reserved 7roRead-only0x0Reserved. Returns zeros on reads.
DXREFISELR0 6:0rwNormal read/write0x9Byte Lane internal VREF Select for Rank0: Selects the generated
VREF value for internal byte lane differential IO buffers.