Zynq UltraScale+ Devices Register Reference > Module Summary > DPDMA Module > DPDMA_ALC1_MAX (DPDMA) Register
Register Name | DPDMA_ALC1_MAX |
---|---|
Relative Address | 0x0000000128 |
Absolute Address | 0x00FD4C0128 (DPDMA) |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | ALC1 Max latency Register |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:16 | razRead as zero | 0x0 | Reseved for future use |
latency | 15:0 | roRead-only | 0x0 | Indicates maximum trnasaction latency logged since last clear |