Zynq UltraScale+ Devices Register Reference > Module Summary > DDR_PHY Module > DTEDR0 (DDR_PHY) Register

DTEDR0 (DDR_PHY) Register

DTEDR0 (DDR_PHY) Register Description

Register NameDTEDR0
Relative Address0x0000000230
Absolute Address 0x00FD080230 (DDR_PHY)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionData Training Eye Data Register 0

DTEDR0 (DDR_PHY) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:30roRead-only0x0Reserved. Return zeroes on reads.
WDQBMX29:24roRead-only0x0This field is the delay that is added to all write dq BDLs during write eye
centering to detect the right DQ edges.
WDQBMN23:18roRead-only0x0This field is the delay that is added to all write dq BDLs during write eye
centering to detect the left DQ edges.
Reserved17:9roRead-only0x0Reserved. Return zeros on reads.
Reserved 8:0roRead-only0x0Reserved. Return zeros on reads.