Zynq UltraScale+ Devices Register Reference > Module Summary > SPI Module > IMR (SPI) Register

IMR (SPI) Register

IMR (SPI) Register Description

Register NameIMR
Relative Address0x0000000010
Absolute Address 0x00FF040010 (SPI0)
0x00FF050010 (SPI1)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionInterrupt mask

0: interrupt disabled. 1: interrupt enabled.

IMR (SPI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:7roRead-only0x0Reserved, read as zero, ignored on write.
TX_FIFO_underflow 6roRead-only0x0TX FIFO underflow
enable
RX_FIFO_full 5roRead-only0x0RX FIFO full
enable
RX_FIFO_not_empty 4roRead-only0x0RX FIFO not empty
enable
TX_FIFO_full 3roRead-only0x0TX FIFO full
enable
TX_FIFO_not_full 2roRead-only0x0TX FIFO not full
enable
MODE_FAIL 1roRead-only0x0ModeFail interrupt
enable
RX_OVERFLOW 0roRead-only0x0Receive Overflow interrupt enable