Zynq UltraScale+ Devices Register Reference > Module Summary > GIC400 Module > GICH_EISR0_Alias2 (GIC400) Register

GICH_EISR0_Alias2 (GIC400) Register

GICH_EISR0_Alias2 (GIC400) Register Description

Register NameGICH_EISR0_Alias2
Relative Address0x0000050420
Absolute Address 0x00F9050420 (ACPU_GIC)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionEnd of Interrupt Status Register

GICH_EISR0_Alias2 (GIC400) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:0roRead-only0x0Refer to the Arm Generic Interrupt Controller Architecture Specification 2.0 for a detailed register descriptions.