Zynq UltraScale+ Devices Register Reference > Module Summary > STM Module > SPMOVERRIDER (STM) Register
Register Name | SPMOVERRIDER |
---|---|
Relative Address | 0x0000000E6C |
Absolute Address | 0x00FE9C0E6C (CORESIGHT_SOC_STM) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Enables a debugger to choose which masters the STMSPOVERRIDERR applies to. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
MASTSEL | 22:15 | rwNormal read/write | 0 | This field defines which master ports the override controls apply to.This size of this field is defined by the number of implemented masters |
MASTCTL | 0 | rwNormal read/write | 0x0 | This defines how the master selection is applied: 0: disable. 1: enable. |