Zynq UltraScale+ Devices Register Reference > Module Summary > CRL_APB Module > RESET_CTRL (CRL_APB) Register

RESET_CTRL (CRL_APB) Register

RESET_CTRL (CRL_APB) Register Description

Register NameRESET_CTRL
Relative Address0x0000000218
Absolute Address 0x00FF5E0218 (CRL_APB)
Width 8
TyperwNormal read/write
Reset Value0x00000001
DescriptionPS_SRST_B Pin Control and Trigger.

RESET_CTRL (CRL_APB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved 7:5rwNormal read/write0x0reserved.
soft_reset 4rwNormal read/write0x0Software reset.
Cause a system reset to occur. This is the equivalent to asserting the external PS_SRST_B reset signal pin.
Reserved 3:2rwNormal read/write0x0reserved.
Reserved 1rwNormal read/write0x0reserved.
srst_dis 0rwNormal read/write0x10: PS_SRST_B reset pin will functional properly.
1: PS_SRST_B reset pin will be disabled.
System reset will disable.
BootROM will enable.