Zynq UltraScale+ Devices Register Reference > Module Summary > GPU Module > GP_CONTR_REG_CMD (GPU) Register
Register Name | GP_CONTR_REG_CMD |
---|---|
Relative Address | 0x0000000020 |
Absolute Address | 0x00FD4B0020 (GPU) |
Width | 32 |
Type | woWrite-only |
Reset Value | 0x00000000 |
Description | GP Control Register Command |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:12 | woWrite-only | 0x0 | Reserved, write as zero, read undefined |
GP_CMD_CLK_OVERRIDE | 11 | woWrite-only | 0x0 | Disable block level clock gates. Writing a 1 to this bit overrides all the architectural clock gates in the design so all clocks are always active |
GP_CMD_SOFT_RESET | 10 | woWrite-only | 0x0 | Waits until all outstanding bus-transfers are completed, then resets the internal state of GP. Use the GP_IRQ_RESET_COMPLETED interrupt bit to discover when the reset has actually completed |
GP_CMD_STOP_BUS | 9 | woWrite-only | 0x0 | Stop data bus. |
GP_CMD_START_BUS | 8 | woWrite-only | 0x0 | Start data bus. |
Reserved | 7 | woWrite-only | 0x0 | Reserved, write as zero, read undefined. |
GP_CMD_FORCE_HANG | 6 | woWrite-only | 0x0 | Force hang. This functionality depends on the watchdog timer |
GP_CMD_FORCE_RESET | 5 | woWrite-only | 0x0 | Resets the internal state of GP immediately. If GP_CMD_FORCE_RESET is asserted while there is a bus transaction in progress the AXI interconnect might operate at reduced efficiency or lockup. To ensure a safe reset: 1. Write 1 to GP_CMD_STOP_BUS. 2. Wait until all transactions have completed. The GP_IRQ_AXI_BUS_STOPPED interrupt is asserted when the bus is idle. 3. Write 1 to GP_CMD_FORCE_RESET. The use of GP_CMD_FORCE_RESET must be deprecated, unless you require backwards compatibility with Mali-200. |
GP_CMD_UPDATE_PLB_ALLOC | 4 | woWrite-only | 0x0 | Update polygon list allocation addresses. |
Reserved | 3:2 | woWrite-only | 0x0 | Reserved, write as zero, read undefined. |
GP_CMD_START_PLB | 1 | woWrite-only | 0x0 | Start PLB. |
GP_CMD_START_VS | 0 | woWrite-only | 0x0 | Start vertex shader. |