Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_CIDR0 (SMMU500) Register
Register Name | SMMU_CIDR0 |
---|---|
Relative Address | 0x0000000FF0 |
Absolute Address | 0x00FD800FF0 (SMMU_GPV) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x0000000D |
Description | Component Identification register 0 |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
PREAMBLE | 7:0 | roRead-only | 0xD | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |