Zynq UltraScale+ Devices Register Reference > Module Summary > SATA_AHCI_PORTCNTRL Module > PxSACT (SATA_AHCI_PORTCNTRL) Register

PxSACT (SATA_AHCI_PORTCNTRL) Register

PxSACT (SATA_AHCI_PORTCNTRL) Register Description

Register NamePxSACT
Relative Address0x0000000034
Absolute Address 0x00FD0C0134 (SATA_AHCI_PORT0_CNTRL)
0x00FD0C01B4 (SATA_AHCI_PORT1_CNTRL)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionPort x Serial ATA Active (SCR3: SActive)

PxSACT (SATA_AHCI_PORTCNTRL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
DS31:0rwNormal read/write0x0Device Status (DS): This field is bit significant. Each bit corresponds to the TAG and command slot of a native queued command, where bit 0 corresponds to TAG 0 and command slot 0. This field is set by software prior to issuing a native queued command for a particular command slot.
Prior to writing PxCI[TAG] to 1, software will set DS[TAG] to 1 to indicate that a command with that TAG is outstanding.
The device clears bits in this field by sending a Set Device Bits FIS to the host.
The HBA clears bits in this field that are set to 1 in the SActive field of the Set Device Bits FIS. The HBA only clears bits that correspond to native queued commands that have completed successfully. Software should only write this field when PxCMD.ST is set to 1. This field is cleared when PxCMD.ST is written from a 1 to a 0 by software. This field is not cleared by a COMRESET or a software reset.