Zynq UltraScale+ Devices Register Reference > Module Summary > DDR_PHY Module > DX2RSR2 (DDR_PHY) Register
Register Name | DX2RSR2 |
---|---|
Relative Address | 0x00000009D8 |
Absolute Address | 0x00FD0809D8 (DDR_PHY) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | DATX8 n Rank Status Register 2 |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:16 | roRead-only | 0x0 | Reserved. Return zeroes on reads. |
WLAWN | 15:0 | roRead-only | 0x0 | Write Latency Adjustment 'DQS off on some DQ lines' warning. One bit per rank indicates that, for that rank, the WLA algorithm found some DQ lines where the read data sequence did not match the expected comparison signatures. This is for the byte in x8 mode |