Zynq UltraScale+ Devices Register Reference > Module Summary > A53_PMU_2 Module > PIDR0 (A53_PMU_2) Register

PIDR0 (A53_PMU_2) Register

PIDR0 (A53_PMU_2) Register Description

Register NamePIDR0
Relative Address0x0000000FE0
Absolute Address 0x00FEE30FE0 (CORESIGHT_A53_PMU_2)
Width32
TyperoRead-only
Reset Value0x000000D3
DescriptionPerformance Monitors Peripheral Identification Register 0

PIDR0 (A53_PMU_2) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PART_0 7:0roRead-only0xD3Part number, least significant byte.