Zynq UltraScale+ Devices Register Reference > Module Summary > GPU Module > PP0_MMU_INT_RAWSTAT (GPU) Register

PP0_MMU_INT_RAWSTAT (GPU) Register

PP0_MMU_INT_RAWSTAT (GPU) Register Description

Register NamePP0_MMU_INT_RAWSTAT
Relative Address0x0000004014
Absolute Address 0x00FD4B4014 (GPU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionMMU Raw Interrupt Status Register

PP0_MMU_INT_RAWSTAT (GPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:2rwNormal read/write0x0Reserved, read undefined, write as zero
read_bus_error 1rwNormal read/write0x0Read bus error
page_fault 0rwNormal read/write0x0Page fault