Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_SIDR7 (SMMU500) Register
Register Name | SMMU_SIDR7 |
---|---|
Relative Address | 0x000000003C |
Absolute Address | 0x00FD80003C (SMMU_GPV) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00000021 |
Description | Provides SMMU capability information. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
MAJOR | 7:4 | roRead-only | 0x2 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |
MINOR | 3:0 | roRead-only | 0x1 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |