Zynq UltraScale+ Devices Register Reference > Module Summary > DDR_PHY Module > DX8SLbPLLCR1 (DDR_PHY) Register

DX8SLbPLLCR1 (DDR_PHY) Register

DX8SLbPLLCR1 (DDR_PHY) Register Description

Register NameDX8SLbPLLCR1
Relative Address0x00000017C8
Absolute Address 0x00FD0817C8 (DDR_PHY)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionDAXT8 0-8 PLL Control Register 1 (Type B PLL Only)

DX8SLbPLLCR1 (DDR_PHY) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:22woWrite-only0Reserved. Return zeroes on reads
PLLPROG21:6woWrite-only0Connects to the PLL PLL_PROG bus. Reserved. Set to 0x0000.
BYPVREGCP 5woWrite-only0Bypass PLL vreg_cp
BYPVREGDIG 4woWrite-only0Bypass PLL vreg_dig.
Reserved 3woWrite-only0reserved.
LOCKPS 2woWrite-only0Lock Detector Phase Select. Connects to pin LOCK_PHASE_SEL
on the PLL.
LOCKCS 1woWrite-only0Lock Detector Counter Select. Connects to pin
LOCK_COUNT_SEL on the PLL.
LOCKDS 0woWrite-only0Lock Detector Select. Connects to pin LOCK_DET_SEL on the
PLL on the PLL.