Zynq UltraScale+ Devices Register Reference > Module Summary > USB3_XHCI Module > SUPTPRT2_DW2 (USB3_XHCI) Register
Register Name | SUPTPRT2_DW2 |
---|---|
Relative Address | 0x00000008F8 |
Absolute Address |
0x00FE2008F8 (USB3_0_XHCI) 0x00FE3008F8 (USB3_1_XHCI) |
Width | 32 |
Type | roRead-only |
Reset Value | 0x00080201 |
Description | xHCI Supported Protocol Capability_ Data Word 2 For a description of other register fields, see section 7.2 of the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.0. |
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
PSIC | 31:28 | roRead-only | 0x0 | PSIC |
MHD | 27:25 | roRead-only | 0x0 | Hub Depth For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.0. |
BLC | 20 | roRead-only | 0x0 | BESL LPM Capability. When this bit is set to: - 1: The ports described by this xHCI Supported Protocol Capability applies BESL timing to the BESL and BESLD fields of the PORTPMSC and PORTHLPMC registers. - 0: The ports described by this xHCI Supported Protocol Capability applies HIRD timing to the BESL and BESLD fields of the PORTPMSC and PORTHLPMC registers. |
HLC | 19 | roRead-only | 0x1 | Compatible Port Offset. Compatible Port Count |
IHI | 18 | roRead-only | 0x0 | IHI |
HSO | 17 | roRead-only | 0x0 | HSO |
COMPATIBLE_PORT_COUNT | 15:8 | roRead-only | 0x2 | COMPATIBLE_PORT_COUNT For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.0. |
COMPATIBLE_PORT_OFFSET | 7:0 | roRead-only | 0x1 | COMPATIBLE_PORT_OFFSET For a description of this standard USB register field, see the eXtensible Host Controller Interface for Universal Serial Bus (USB) Specification 3.0. |