Zynq UltraScale+ Devices Register Reference > Module Summary > PCIE_ATTRIB Module > ATTR_89 (PCIE_ATTRIB) Register

ATTR_89 (PCIE_ATTRIB) Register

ATTR_89 (PCIE_ATTRIB) Register Description

Register NameATTR_89
Relative Address0x0000000164
Absolute Address 0x00FD480164 (PCIE_ATTRIB)
Width32
TyperwNormal read/write
Reset Value0x00002281
DescriptionATTR_89

This register should only be written to during reset of the PCIe block

ATTR_89 (PCIE_ATTRIB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr_vsec_cap_on13rwNormal read/write0x1Indicates that the VSEC structures exists. If this is FALSE, then the VSEC structure cannot be accessed via either the link or the management port.
attr_vsec_cap_nextptr12:1rwNormal read/write0x140VSECs Next Capability Offset pointer to the next item in the capabilities list, or 000h if this is the final capability.
attr_vsec_cap_is_link_visible 0rwNormal read/write0x1The VSEC structure can be detected by link-side config accesses if TRUE. Otherwise, it is only user-side visible.