Zynq UltraScale+ Devices Register Reference > Module Summary > DDRC Module > SWCTL (DDRC) Register

SWCTL (DDRC) Register

SWCTL (DDRC) Register Description

Register NameSWCTL
Relative Address0x0000000320
Absolute Address 0x00FD070320 (DDRC)
Width32
TyperwNormal read/write
Reset Value0x00000001
DescriptionSoftware register programming control enable

This register is dynamic. Dynamic registers can be written at any time during operation.

SWCTL (DDRC) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
sw_done 0rwNormal read/write0x1Enable quasi-dynamic register programming outside reset. Program register to 0 to enable quasi-dynamic programming. Set back register to 1 once programming is done.