Zynq UltraScale+ Devices Register Reference > Module Summary > SMMU500 Module > SMMU_STLBIALLM (SMMU500) Register

SMMU_STLBIALLM (SMMU500) Register

SMMU_STLBIALLM (SMMU500) Register Description

Register NameSMMU_STLBIALLM
Relative Address0x00000000BC
Absolute Address 0x00FD8000BC (SMMU_GPV)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionInvalidates all unlocked entries associated with MONC banks in the TLB.

SMMU_STLBIALLM (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
bits31:0woWrite-only0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details