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#
#  Steps to create completed project
#
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  1. Run the Tcl script.
     a. Locate the Tcl console in the Vivado Design Suite. 
               
     b. Enter the following command to change the directory to Tcl completer directory:
        [Linux Users]: cd /home/amd/training/IP_Flow/completed
 
     c. Enter the following Tcl command to source the script:
        source IP_Flow_completer.tcl

  2. Set Tcl variables.
     a. Enter the following Tcl commands in the Tcl Console:
        use <platform>    
        use <language> 
 
        Where <language> is either Verilog or VHDL
              <platform> is KCU105

  3. Create a Completed project
     a. Enter the following command to run the steps of the lab:
        make all
    
     b. Manually refresh the sources hierarchy of the Vivado project.
        Right click at Hierarchy tab of sources window and select "Refresh Hierarchy"

     c. Enter the following proc to run the implementation process:
       	ImplDsgn


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