system_link --xo /home/amd/training/system_simulation/lab/sys_project/mm2s/mm2s/mm2s.xo --xo /home/amd/training/system_simulation/lab/sys_project/s2mm/s2mm/s2mm.xo -keep /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/.Xil/v++-13103-CustEd-VM/a0/hw.o --config /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/syslinkConfig.ini --xpfm /opt/amd/2025.1/Vitis/base_platforms/xilinx_vck190_base_202510_1/xilinx_vck190_base_202510_1.xpfm --target emu --output_dir /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int --temp_dir /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/sys_link
cf2sw -sdsl /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/sdsl.dat -rtd /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/cf2sw.rtd -nofilter /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/cf2sw_full.rtd -xclbin /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/xclbin_orig.xml -o /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/xclbin_orig.1.xml
rtd2SystemDiagram
vpl -t hw_emu -f /opt/amd/2025.1/Vitis/base_platforms/xilinx_vck190_base_202510_1/xilinx_vck190_base_202510_1.xpfm -s -g --remote_ip_cache /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/.ipcache --output_dir /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int --log_dir /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/logs/binary_container_1 --report_dir /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/reports/binary_container_1 --config /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/vplConfig.ini -k /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/kernel_info.dat --webtalk_flag Vitis --temp_dir /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1 --emulation_mode debug_waveform --no-info --iprepo /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/xo/ip_repo/xilinx_com_hls_s2mm_1_0 --iprepo /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/xo/ip_repo/xilinx_com_hls_mm2s_1_0 --messageDb /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/run_link/vpl.pb /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/dr.bd.tcl
rtdgen
xclbinutil --add-section PDI:RAW:/home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/run_link/../int/vpl_gen_fixed_presynth.pdi --add-section DEBUG_IP_LAYOUT:JSON:/home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/debug_ip_layout.rtd --add-section BITSTREAM:RAW:/home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/behav.xse --force --target hw_emu --key-value SYS:dfx_enable:false --add-section :JSON:/home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/binary_container_1.rtd --add-section CLOCK_FREQ_TOPOLOGY:JSON:/home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/binary_container_1_xml.rtd --add-section BUILD_METADATA:JSON:/home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/binary_container_1_build.rtd --add-section EMBEDDED_METADATA:RAW:/home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/binary_container_1.xml --add-section SYSTEM_METADATA:RAW:/home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/systemDiagramModelSlrBaseAddress.json --add-section AIE_METADATA:JSON:/home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/aie_control_config.json --key-value SYS:PlatformVBNV:xilinx.com_vck190_versal_extensible_platform_base_1_0 --output /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/binary_container_1.xclbin
xclbinutil --quiet --force --info /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/binary_container_1.xclbin.info --input /home/amd/training/system_simulation/lab/sys_project/system_project/build/hw_emu/hw_link/binary_container_1/binary_container_1/int/binary_container_1.xclbin
