--incr --debug "typical" --relax --mt "8" -sv_root "/opt/amd/2025.1/data/xsim/ip/noc_sc_v1_0_0" -sc_lib "libnoc_sc_v1_0_0.so" --include "/opt/amd/2025.1/data/xsim/ip/noc_sc_v1_0_0/include" -sv_root "/opt/amd/2025.1/Vivado/data/simmodels/xsim/2025.1/lnx64/9.3.0/ext/protobuf" -sc_lib "libprotobuf.so" --include "/opt/amd/2025.1/Vivado/data/simmodels/xsim/2025.1/lnx64/9.3.0/ext/protobuf/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/sim_qdma_cpp_v1_0" -sc_lib "libsim_qdma_cpp_v1_0.so" --include "/opt/amd/2025.1/data/xsim/ip/sim_qdma_cpp_v1_0/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/axi_tlm_ext_v1_0" -sc_lib "libaxi_tlm_ext_v1_0.so" --include "/opt/amd/2025.1/data/xsim/ip/axi_tlm_ext_v1_0/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/remote_port_c_v4" -sc_lib "libremote_port_c_v4.so" --include "/opt/amd/2025.1/data/xsim/ip/remote_port_c_v4/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/xtlm_ipc_v1_0" -sc_lib "libxtlm_ipc_v1_0.so" --include "/opt/amd/2025.1/data/xsim/ip/xtlm_ipc_v1_0/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/sim_qdma_sc_v1_0" -sc_lib "libsim_qdma_sc_v1_0.so" --include "/opt/amd/2025.1/data/xsim/ip/sim_qdma_sc_v1_0/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/xtlm_ap_ctrl_v1_0" -sc_lib "libxtlm_ap_ctrl_v1_0.so" --include "/opt/amd/2025.1/data/xsim/ip/xtlm_ap_ctrl_v1_0/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/xtlm_simple_interconnect_v1_0" -sc_lib "libxtlm_simple_interconnect_v1_0.so" --include "/opt/amd/2025.1/data/xsim/ip/xtlm_simple_interconnect_v1_0/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/common_cpp_v1_0" -sc_lib "libcommon_cpp_v1_0.so" --include "/opt/amd/2025.1/data/xsim/ip/common_cpp_v1_0/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/debug_tcp_server_v1" -sc_lib "libdebug_tcp_server_v1.so" --include "/opt/amd/2025.1/data/xsim/ip/debug_tcp_server_v1/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/common_rpc_v1" -sc_lib "libcommon_rpc_v1.so" --include "/opt/amd/2025.1/data/xsim/ip/common_rpc_v1/include" -sv_root "/opt/amd/2025.1/Vivado/data/simmodels/xsim/2025.1/lnx64/9.3.0/systemc/protected/noc_v1_0_0" -sc_lib "libnoc_v1_0_0.so" --include "/opt/amd/2025.1/Vivado/data/simmodels/xsim/2025.1/lnx64/9.3.0/systemc/protected/noc_v1_0_0/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/xtlm" -sc_lib "libxtlm.so" --include "/opt/amd/2025.1/data/xsim/ip/xtlm/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/aie_ps_v1_0" -sc_lib "libaie_ps_v1_0.so" --include "/opt/amd/2025.1/data/xsim/ip/aie_ps_v1_0/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/remote_port_sc_v4" -sc_lib "libremote_port_sc_v4.so" --include "/opt/amd/2025.1/data/xsim/ip/remote_port_sc_v4/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/pl_fileio_v1_0_0" -sc_lib "libpl_fileio_v1_0_0.so" --include "/opt/amd/2025.1/data/xsim/ip/pl_fileio_v1_0_0/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/aie_xtlm_v1_0_0" -sc_lib "libaie_xtlm_v1_0_0.so" --include "/opt/amd/2025.1/data/xsim/ip/aie_xtlm_v1_0_0/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/rwd_tlmmodel_v1" -sc_lib "librwd_tlmmodel_v1.so" --include "/opt/amd/2025.1/data/xsim/ip/rwd_tlmmodel_v1/include" -sv_root "/opt/amd/2025.1/data/xsim/ip/emu_perf_common_v1_0" -sc_lib "libemu_perf_common_v1_0.so" --include "/opt/amd/2025.1/data/xsim/ip/emu_perf_common_v1_0/include" --include "../../../../prj.gen/sim_1/bd/xlnoc/ip/xlnoc_snoc_sysc_inst_0/sysc" --include "../../../../prj.gen/sim_1/bd/xlnoc/ip/xlnoc_snoc_sysc_inst_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_CIPS_0_0/sim_tlm" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_CIPS_0_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_0/sysc" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_1/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_2/sysc" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_2/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_3/sysc" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_3/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_4/sysc" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_4/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_5/sysc" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_5/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_6/sysc" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_6/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_7/sysc" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_7/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_8/sysc" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_8/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_9/sysc" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/bd_0/ip/ip_9/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_cips_noc_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_noc_ddr4_0/bd_0/ip/ip_0/sysc" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_noc_ddr4_0/bd_0/ip/ip_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_noc_ddr4_0/bd_0/ip/ip_1/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_noc_ddr4_0/bd_0/ip/ip_2/sysc" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_noc_ddr4_0/bd_0/ip/ip_2/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_noc_ddr4_0/bd_0/ip/ip_3/sysc" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_noc_ddr4_0/bd_0/ip/ip_3/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_noc_ddr4_0/bd_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_noc_ddr4_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_ai_engine_0_0/sim_tlm" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_ai_engine_0_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_noc_lpddr4_0/bd_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_noc_lpddr4_0/bd_0/ip/ip_0/sysc" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_noc_lpddr4_0/bd_0/ip/ip_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_noc_lpddr4_0/bd_0/ip/ip_1/sysc" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_noc_lpddr4_0/bd_0/ip/ip_1/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_noc_lpddr4_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_dummy_slave_0_0/sysc" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_dummy_slave_0_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_dummy_slave_1_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_dummy_slave_2_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_dummy_slave_3_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_icn_ctrl_0/xtlm" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_icn_ctrl_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_icn_ctrl_0_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_icn_ctrl_1_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_icn_ctrl_2_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_icn_ctrl_3_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_axi_intc_cascaded_1_intr_1_interrupt_concat_0/sysc" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_axi_intc_cascaded_1_intr_1_interrupt_concat_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_irq_const_tieoff_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_dpa_ctrl_interconnect_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_dpa_hub_0/src" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_dpa_hub_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_dpa_mon0_0/src" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_dpa_mon0_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_dpa_mon1_0/src" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_dpa_mon1_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_dpa_mon2_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/ip/vitis_design_dpa_mon3_0/sim" --include "../../../../prj.ip_user_files/bd/vitis_design/sim" --include "/opt/amd/2025.1/Vivado/tps/boost_1_72_0" -L "xil_defaultlib" -L "axi_lite_ipif_v3_0_4" -L "axi_intc_v4_1_21" -L "proc_sys_reset_v5_0_17" -L "uvm" -L "xilinx_vip" -L "unisims_ver" -L "unimacro_ver" -L "unisims_ver" -L "secureip" -L "hnicx" -L "cpm5n" -L "xpm" -sv_root "." -sc_lib "libdpi.so" --snapshot "tb_behav" "xil_defaultlib.tb" "xil_defaultlib.glbl" -log "elaborate.log" -ignore_assertions --debug "sc" 
