-------------------------------------
| Tool Version : Vivado v.2025.2
| Date         : Tue Nov 18 16:02:53 2025
| Host         : xhdshabbirk50x
| Design       : design_1
| Device       : xcsu35p-sbvb625-2-E-
-------------------------------------

For more information on clockInfo.txt clock routing debug file see https://support.xilinx.com/s/article/000035660?language=en_US

***********************
Running Pre-CRP Checker
***********************
Number of global clocks: 6
	Number of BUFGCE: 4
	Number of BUFGCE_HDIO: 0
	Number of BUFG_CTRL: 2
	Number of BUFGCE_DIV: 0
	Number of BUFG_GT: 0
	Number of BUFG_PS: 0
	Number of BUFG_FABRIC: 0
	Running suboptimal placement checker for 5 clocks (and their loads) which do not have the CLOCK_LOW_FANOUT property but have a fanout less than 2000...
Pre-CRP Checker took 0 secs

**************************************
Clock Nets/Source Overview (CRP Input)
**************************************
Clock 1: scu35_io_design_i/clk_wiz_1/inst/clk_out1
	Clock source type: BUFGCE
	Clock source region: X0Y1
	initial rect ((0, 0), (0, 1))

Clock 2: scu35_io_design_i/mdm_1/U0/MDM_Core_I1/JTAG_CONTROL_I/Test_Access_Port.BUFG_DRCK/Using_FPGA.Native_0
	Clock source type: BUFG_CTRL
	Clock source region: X0Y1
	initial rect ((0, 1), (0, 1))

Clock 3: scu35_io_design_i/mdm_1/U0/MDM_Core_I1/JTAG_CONTROL_I/Test_Access_Port.BUFG_UPDATE/Using_FPGA.Native_0
	Clock source type: BUFGCE
	Clock source region: X0Y1
	initial rect ((0, 1), (0, 1))

Clock 4: scu35_io_design_i/mdm_1/U0/Use_E2.BSCAN_I/tck_BUFGCE
	Clock source type: BUFGCE
	Clock source region: X0Y1
	initial rect ((0, 0), (0, 1))

Clock 5: scu35_io_design_i/mdm_1/U0/Use_JTAG_BSCAN.BUFG_JTAG_TCK/Use_JTAG_BSCAN.tck_int
	Clock source type: BUFG_CTRL
	Clock source region: X0Y1
	initial rect ((0, 1), (0, 1))

Clock 6: scu35_io_design_i/clk_wiz_1/inst/clk_in1_scu35_io_design_clk_wiz_1_0
	Clock source type: BUFGCE
	Clock source region: X0Y1
	Clock regions with locked loads: X0Y1 
	initial rect ((0, 1), (0, 1))



*****************************
Clocks With User Constraints:
*****************************
No clocks with user constraints found


